M16CSLASH26 datasheet(129/239 Pages) RENESAS

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Clock Synchronous Serial I/O Mode

123

Renesas Technology Corp.

M16C/26 Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Under

development

Preliminary Specifications Rev. 0.9

Specifications in this manual are tentative and subject to change.

Pin name

Function

Method of selection

TxDi

(P63, P67, P70)

Serial data output

Serial data input

Transfer clock output

Transfer clock input

Programmable I/O port

(Outputs dummy data when performing reception only)

RxDi

(P62, P66, P71)

CLKi

(P61, P65, P72)

Internal/external clock select bit (bit 3 at address 03A016, 03A816, 037816) = 0

Internal/external clock select bit (bit 3 at address 03A016, 03A816, 037816) = 1

Port P61, P65 and P72 direction register (bits 1 and 5 at address 03EE16,

bit 2 at address 03EF16) = 0

Port P62, P66 and P71 direction register (bits 2 and 6 at address 03EE16,

bit 1 at address 03EF16)= 0

(Can be used as an input port when performing transmission only)

CTS/RTS disable bit (bit 4 at address 03A416, 03AC16, 037C16) = 0

CTS/RTS function select bit (bit 2 at address 03A416, 03AC16, 037C16) = 0

Port P60, P64 and P73 direction register (bits 0 and 4 at address 03EE16,

bit 3 at address 03EF16) = 0

CTS/RTS disable bit (bit 4 at address 03A416, 03AC16, 037C16) = 0

CTS/RTS function select bit (bit 2 at address 03A416, 03AC16, 037C16) = 1

CTS/RTS disable bit (bit 4 at address 03A416, 03AC16, 037C16) = 1

CTS input

RTS output

CTSi/RTSi

(P60, P64, P73)

(when transfer clock output from multiple pins is not selected)

Table 1.15.5 lists the functions of the input/output pins during clock synchronous serial I/O mode. This

table shows the pin functions when the transfer clock output from multiple pins function is not selected.

Note that for a period from when the UARTi operation mode is selected to when transfer starts, the TxDi

pin outputs an “H”. (If the N-channel open-drain is selected, this pin is in floating state.)

Table 1.15.5. Input/output pin functions in clock synchronous serial I/O mode

Table 1.15.6. P64 pin function in clock synchronous serial I/O mode

Pin function

Bit set value

U1C0 register

UCON register

PD6 register

CRD

CRS

RCSP

CLKMD1

CLKMD0

PD6_4

P64

Input: 0, Output: 1

CTS1

RTS1

CTS0(Note1)

CLKS1

1(Note 2)

Note 1: In addition to this, set the U0C0 register’s CRD bit to “0” (CTS0/RTS0 enabled) and the U0

C0 register’s CRS bit to “1” (RTS0 selected).

Note 2: When the CLKMD1 bit = 1 and the CLKMD0 bit = 0, the following logic levels are output:

• High if the U1C0 register’s CLKPOL bit = 0

• Low if the U1C0 register’s CLKPOL bit = 1

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