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M16C/26 датащи(PDF) 127 Page - Renesas Technology Corp |
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M16C/26 датащи(HTML) 127 Page - Renesas Technology Corp |
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127 / 239 page ![]() Clock Synchronous Serial I/O Mode 121 Renesas Technology Corp. M16C/26 Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Under development Preliminary Specifications Rev. 0.9 Specifications in this manual are tentative and subject to change. Table 1.15.4. Registers used in clock synchronous serial I/O mode and the register values set Register Bit Function UiTB(Note3) 0 to 7 Set transmission data UiRB(Note3) 0 to 7 Reception data can be read OER Overrun error flag UiBRG 0 to 7 Set a transfer rate UiMR(Note3) SMD2 to SMD0 Set to “0012” CKDIR Select the internal clock or external clock IOPOL Set to “0” UiC0 CLK1 to CLK0 Select the count source for the UiBRG register CRS Select CTS or RTS to use TXEPT Transmit register empty flag CRD Enable or disable the CTS or RTS function NCH Select TxDi pin output mode (Note 2) CKPOL Select the transfer clock polarity UFORM Select the LSB first or MSB first UiC1 TE Set this bit to “1” to enable transmission/reception TI Transmit buffer empty flag RE Set this bit to “1” to enable reception RI Reception complete flag U2IRS (Note 1) Select the source of UART2 transmit interrupt U2RRM (Note 1) Set this bit to “1” to use continuous receive mode UiLCH Set this bit to “1” to use inverted data logic UiERE Set to “0” UiSMR 0 to 7 Set to “0” UiSMR2 0 to 7 Set to “0” UiSMR3 0 to 2 Set to “0” NODC Select clock output mode 4 to 7 Set to “0” UiSMR4 0 to 7 Set to “0” UCON U0IRS, U1IRS Select the source of UART0/UART1 transmit interrupt U0RRM, U1RRM Set this bit to “1” to use continuous receive mode CLKMD0 Select the transfer clock output pin when CLKMD1 = 1 CLKMD1 Set this bit to “1” to output UART1 transfer clock from two pins RCSP Set this bit to “1” to accept as input the UART0 CTS0 signal from the P64 pin 7 Set to “0” Note 1: Set the U0C1 and U1C1 register bit 4 and bit 5 to “0”. The U0IRS, U1IRS, U0RRM and U1RRM bits are in the UCON register. Note 2: TxD2 pin is N channel open-drain output. Set the U2C0 register's NCH bit to “0”. Note 3: Not all register bits are described above. Set those bits to “0” when writing to the registers in clock synchronous serial I/O mode. i=0 to 2 |
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