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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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USB97C102 датащи(PDF) 75 Page - SMSC Corporation |
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USB97C102 датащи(HTML) 75 Page - SMSC Corporation |
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75 / 80 page  SMSC DS – USB97C102 Page 75 Rev. 03/23/2000 FIGURE 18 - DMA TIMING (SINGLE TRANSFER MODE) Table 125 - DMA Timing (Single Transfer Mode) Parameters NAME DESCRIPTION MIN TYP MAX UNITS t1 SA[19:0] Address Setup time to nMEMRD/nIOR or nMEMWR/nIOW Asserted 65 ns t2 nMEMRD/nIOR or nMEMWR/nIOW Pulsewidth 100 ns t3 nMEMRD/nIOR or nMEMWR/nIOW deasserted to SA[19:0] Address valid Hold time 30 ns t4 nDACK Width 150 ns t7 Data Setup Time to nIOR High 50 ns t8 Data Set Up Time to nIOW High 40 ns t9 Data to Float Delay from nIOR High 25 50 ns t10 Data Hold Time from nIOW High 10 ns t11 nDACK Set Up to nIOW/nIOR Low 22.5 ns t12 nDACK Hold after nIOW/nIOR High 22.5 ns t13 TC Pulse Width 60 ns t14 AEN Set Up to nIOR/nIOW 40 ns t15 AEN Hold from nDACK 10 ns t16 nMEMRD/nIOR or nMEMWR/nIOW asserted to Data valid 0 ns t15 t4 t14 t8 t13 AEN nDACK nMEMRD/nIOR or nMEMWR/nIOW DATA SD[7:0] TC SA[19:0] t1 t2 t3 t7 DATA VALID t9 t10 t11 t12 t16 |
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