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USB97C102 датащи(PDF) 37 Page - SMSC Corporation

номер детали USB97C102
подробное описание детали  Multi-Endpoint USB Peripheral Controller with Integrated 5 Port HUB
PDF  80 Pages
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производитель  SMSC [SMSC Corporation]
домашняя страница  http://www.smsc.com
Logo SMSC - SMSC Corporation

USB97C102 датащи(HTML) 37 Page - SMSC Corporation

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SMSC DS – USB97C102
Page 37
Rev. 03/23/2000
Table 57 - Clear Byte Pointer Flip Flop Register
CLEAR_FF
(ISA 0x000C)
CLEAR BYTE POINTER FLIP FLOP
BIT
NAME
R/W
DESCRIPTION
[7:0]
BPFF
W
This register must be written to clear the high/low byte
pointer flip flop prior to reading or writing new address or
word count information to the 8237.
Table 58 - Read Temporary Register
RD_TEMP
(ISA 0x000D)
READ TEMPORARY REGISTER
BIT
NAME
R/W
DESCRIPTION
[7:0]
TEMP_BYTE
R
This location holds the value of the last byte transferred in a
memory-to-memory operation.
Table 59 - Master Clear Register
MSTR_CLR: (ISA 0x000D)
MASTER CLEAR REGISTER
BIT
NAME
R/W
DESCRIPTION
[7:0]
SW_RESET
W
Writing to this register has the same effect on the registers
as a hardware reset. The 8237 will enter the idle state.
Table 60 - Clear Mask Register
CLR_MASK: (ISA 0x000E)
CLEAR MASK REGISTER
BIT
NAME
R/W
DESCRIPTION
[7:0]
CLR_ALL
W
Writing to this register clears the mask bits of all four
channels and allows them to receive DMA requests.
Table 61 - Clear All Mask Bits Register
ALL_MASK
(ISA 0x000F)
WRITE ALL MASK BITS REGISTER
BIT
NAME
R/W
DESCRIPTION
[7:4]
Reserved
W
Reserved
3
CH3_MASK
W
Channel 3 Mask Bit (1 = Set Mask, 0 = Clear Mask)
2
CH2_MASK
W
Channel 2 Mask Bit (1 = Set Mask, 0 = Clear Mask)
1
CH1_MASK
W
Channel 1 Mask Bit (1 = Set Mask, 0 = Clear Mask)
0
CH0_MASK
W
Channel 0 Mask Bit (1 = Set Mask, 0 = Clear Mask)



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