USB97C102 datasheet(61/80 Pages) SMSC

61 / 80 page

SMSC DS – USB97C102

Page 61

Rev. 03/23/2000

The following register allows the MCU to access and control the up/down counters for each endpoint:

Table 111 – Memory Management Policy Command Register

MMPCMD

(0x7FAE)

ENDPOINT COMMAND REGISTER

BIT

NAME

R/W

DESCRIPTION

COMMAND BITS

Disable the Memory Management Policy feature. If

disabled, the endpoint counters will still count, but there will

be no MMP action taken when the counter reaches zero.

Enable the Memory Management Policy feature.

Decrement the count – the MCU must have previously

made the endpoint busy before executing this command.

Increment the count – the MCU must have previously

made the endpoint busy before executing this command.

Get State – this will cause the count and the enable/disable

state to be latched into the MMPSTAT register.

Reserved

[7:5]

COMMAND

R/W

Reset the counter to zero and disable the MMP feature.

Reserved

R/W

Reserved – Reads back as 0.

MMPCMD

(0x7FAE)

ENDPOINT COMMAND REGISTER

BIT

NAME

R/W

DESCRIPTION

ENDPOINT SELECT

Endpoint 0

Endpoint 1

Endpoint 2

Endpoint 3

Endpoint 4

Endpoint 5

Endpoint 6

Endpoint 7

Endpoint 8

Endpoint 9

Endpoint 10

Endpoint 11

Endpoint 12

Endpoint 13

Endpoint 14

[3:0]

EP_Select

R/W

Endpoint 15

Table 112 – Memory Management Policy State Register

MMPSTATE

0x7FAF Reset 0x00

MEMORY MANAGEMENT POLICY STATE REGISTER

BIT

NAME

R/W

DESCRIPTION

Enabled

R/W

MMP State latched by the most recent Get State Command in the

MMPCMD register. When set(1), the MMP feature will be enabled;

when clear(0), the MMP feature will be disabled.

[6:5]

Reserved

R/W

Reserved – Read back as 0.

[4:0]

Count

R/W

Count latched by the most recent Get State Command in the

MMPCMD register.

Note 1: The MMPSTATE register is read/write but it is only read in normal operation.

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