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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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USB97C102 датащи(PDF) 15 Page - SMSC Corporation |
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USB97C102 датащи(HTML) 15 Page - SMSC Corporation |
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15 / 80 page  SMSC DS – USB97C102 Page 15 Rev. 03/23/2000 ISADMA Memory Map The Internal Memory buffer is virtualized into the 8237's 64K address map as 32 independent 1k blocks. After the MMU has allocated a given packet size for a specific PNR, the MMU will make that packet appear to the 8237 as a contiguous block of data in the address ranges depicted in table 5. Table 5 - ISADMA Memory Map 8237 MEMORY ADDRESS DESCRIPTION 0x8000-0xFFFF 32 blocks of 1K Window to Packet 0x0000-0x7FFF 32K Window to External ISA RAM MCU Block Register Summary Table 6 - MCU Block Register Summary ADDRESS NAME R/W DESCRIPTION PAGE RUNTIME REGISTERS 7F00 ISR_0 R/W INT0 Source Register 19 7F01 IMR_0 R/W INT0 Mask Register 20 7F02 ISR_1 R/W INT1 Source Register 20 7F03 IMR_1 R/W INT1 Mask Register 21 7F06 DEV_REV R Device Revision Register 21 7F07 DEV_ID R Device ID Register 21 UTILITY REGISTERS 7F18 GPIOA_DIR R/W GPIO Configuration Register 23 7F19 GPIOA_OUT R/W GPIO Data Output Register 23 7F1A GPIOA_IN R GPIO Data Input Register 23 7F1B UTIL_CONFI G R/W Miscellaneous Configuration Register 24 POWER MANAGEMENT REGISTERS 7F27 CLOCK_SEL R/W 8051 and 8237 Clock Select Register 26 7F28 MEM_BANK2 R/W Flash Bank Select 2 27 7F29 MEM_BANK R/W Flash Bank Select 27 7F2A WU_SRC_1 R/W Wakeup Source 27 7F2B WU_MSK_1 R/W Wakeup Mask 28 7F2C WU_SRC_2 R/W Wakeup Source 28 7F2D WU_MSK_2 R/W Wakeup Mask 29 ISA BUS CONTROL REGISTERS 7F10 GP1Data R/W GP FIFO Data Port #1 21 7F11 GP1Status R GP FIFO status Port #1 22 7F12 GP2Data R/W GP FIFO Data Port #2 21 7F13 GP2Status R GP FIFO status Port #2 22 7F14 GP3Data R/W GP FIFO Data Port #3 21 7F15 GP3Status R GP FIFO status Port #3 22 7F16 GP4Data R/W GP FIFO Data Port #4 22 7F17 GP4Status R GP FIFO status Port #4 22 7F70 BUS_REQ R/W ISA Bus Request Register 29 7F71 IOBASE R/W 8051 ISA I/O Window Base Register 31 7F72 MEMBASE R/W 8051 ISA Memory Window Base Register 31 7F73 BUS_STAT R ISADMA Request Status 30 7F74 BUS_MASK R/W ISADMA Request Interrupt Mask 31 7F7E MCU_TEST2 N/A Reserved for Test 7F7F MCU_TEST1 N/A Reserved for Test |
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