USB97C102 datasheet(54/80 Pages) SMSC

54 / 80 page

SMSC DS – USB97C102

Page 54

Rev. 03/23/2000

Note 3: If the firmware needs to STALL an endpoint, it should first be taken off-line by setting RX_CONT1=0, and

then RX_CON0=1.

Note 4: This allows firmware to manage TX endpoint(s) and hold queued data until the firmware is ready, even if the

host is asking.

This is not as critical as the RX version, but it may be required for Isochronous

synchronization, as well as STALL recovery.

Note 5: These registers can be written to at any time but the SIE won’t be affected until after the current transaction

(on the particular endpoint) is completed. If a particular register is written several times during an SIE

transaction, only the last value written will take effect after the SIE transaction is complete.

Table 96 - LSB FRAME Count Register

FRAMEL

0x7F90 Reset 0x00

FRAME COUNT REGISTER (LOW)

BIT

NAME

R/W

DESCRIPTION

[7:0]

FRAME[7:0]

The 11 bit Frame Number from each SOF packet is loaded with the

RISING edge of EOT when SOF_TOKEN = '1' and ACK = '1'.

Note:

This register is always the last correctly received valid SOF Frame number. Garbled and invalid SOF tokens

do not alter this register. However, the LSB FRAME/MSB FRAME Count registers will be incremented by the

hardware when a missing SOF is detected, or when there is an error in frame number. A SOF is defined as

missing if it does not occur within a range of +/- 3 USBCLKs from the expected frame length. The expected

frame length is the previous interval between SOFs.

Table 97 - MSB FRAME Count Register

FRAMEH

0x7F91 Reset 0x00

FRAME COUNT REGISTER (HIGH)

BIT

NAME

R/W

DESCRIPTION

[7:3]

EXT_FR[15:11]

Extended Frame Count.

The extended count bits are loaded with the RISING edge of

EOT when SOF_TOKEN = '1' and ACK = '1'. The extended

Frame count bit must also be enabled (EN_EXTFRAME = '1' in

SIE_CONFIG).

[2:0]

FRAME[10:8]

Frame Number from each SOF packet is loaded with the

RISING edge of EOT when SOF_TOKEN = '1' and ACK = '1'.

Note:

This register is always the last correctly received valid SOF Frame number. Garbled and invalid SOF tokens

do not alter this register. However, the LSB FRAME/MSB FRAME Count registers will be incremented by the

hardware when a missing SOF is detected, or when there is an error in frame number. A SOF is defined as

missing if it does not occur within a range of +/- 3 USBCLKs from the expected frame length. The expected

frame length is the previous interval between SOFs.

Table 98 - Local Address Register

SIE_ADDR

(0x7F92 RESET=0x00)

LOCAL ADDRESS REGISTER

BIT

NAME

R/W

DESCRIPTION

RX_ALL

R/W

1 = Overrides the token address decoding of the SIE such

that no compare is done. Token CRC is also ignored when

RX_ALL=1. This bit forces all packets transmitted on the wire

to be received in the RX Packet Queue

[6:0]

ADDR[6:0]

R/W

This register is only written by the 8051. It is the SIE's local

address assigned during enumeration.

This is the default

SIE address. ALL endpoints will send/receive on this

address. This address can be used for the HUB address.

Note:

When RX_ALL is enabled, software should not enable any TX endpoints as they will respond to any

Address with the same endpoint and possibly cause contention on the line. Software should also set each

RX endpoint RX_ISO bit to prevent handshakes from being sent.

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