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USB97C102 датащи(PDF) 38 Page - SMSC Corporation

номер детали USB97C102
подробное описание детали  Multi-Endpoint USB Peripheral Controller with Integrated 5 Port HUB
PDF  80 Pages
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производитель  SMSC [SMSC Corporation]
домашняя страница  http://www.smsc.com
Logo SMSC - SMSC Corporation

USB97C102 датащи(HTML) 38 Page - SMSC Corporation

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SMSC DS – USB97C102
Page 38
Rev. 03/23/2000
SCATTER-GATHER DMA (SGDMA) REGISTER DESCRIPTION
The SGDMA has four DMA channels with each channel having its own set of registers (FIGURE 7). Each register set
starts at a different starting BASE address: Channels 0, 1,2, and 3 have starting BASE addresses 7FB0, 7FBA,
7FC4, and 7FCE, respectively. The tables on the following pages describe each register of one register set, using ‘x’
to denote the DMA channel (x ranges from 0 to 3). The address of each register is denoted as BASE+n, where n is
the offset from BASE.
FIGURE 7 – SGDMA REGISTER SPACE
BASE
Address
7FB0
7FBA
7FC4
7FCE
OFFSET 0 - SGDMA_START_FIFO0
OFFSET 9 - SGDMA_CMD0
OFFSET 3 - SGDMA_ADLO0
OFFSET 2 - SGDMA_ADHI0
OFFSET 1 - SGDMA_DONE_FIFO0
OFFSET 0 - SGDMA_START_FIFO1
OFFSET 9 - SGDMA_CMD1
OFFSET 3 - SGDMA_ADLO1
OFFSET 2 - SGDMA_ADHI1
OFFSET 1 - SGDMA_DONE_FIFO1
OFFSET 0 - SGDMA_START_FIFO2
OFFSET 9 - SGDMA_CMD2
OFFSET 3 - SGDMA_ADLO2
OFFSET 2 - SGDMA_ADHI2
OFFSET 1 - SGDMA_DONE_FIFO2
OFFSET 0 - SGDMA_START_FIFO3
OFFSET 9 - SGDMA_CMD3
OFFSET 3 - SGDMA_ADLO3
OFFSET 2 - SGDMA_ADHI3
OFFSET 1 - SGDMA_DONE_FIFO3
Effective
Address
7FB3
7FB2
7FB1
7FB0
7FB9
7FBA
7FBD
7FC3
7FBC
7FBB
7FC4
7FC7
7FCD
7FC6
7FC5
7FCE
7FD1
7FD7
7FD0
7FCF
SGDMA Channel 3 Registers
SGDMA Channel 2 Registers
SGDMA Channel 1 Registers
SGDMA Channel 0 Registers



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