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USB97C102 датащи(PDF) 24 Page - SMSC Corporation |
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USB97C102 датащи(HTML) 24 Page - SMSC Corporation |
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24 / 80 page ![]() SMSC DS – USB97C102 Page 24 Rev. 03/23/2000 Table 28 - Utility Configuration Register UTIL_CONFIG (0x7F1B- RESET=0x00) UTILITY CONFIGURATION REGISTER BIT NAME R/W DESCRIPTION [7:5] Reserved R Reserved 4 GPIO4/SOF R/W GPIO4/SOF Output Select Mux 0 = GPIO4 1 = SOF port 3 GPIO3/T1 R/W P3.5 Timer 1 input trigger source 0 = GPIO3 1 = SOF FRAME write strobe 2 GPIO2/T0 R/W P3.4 Timer 0 input trigger source 0 = GPIO2 1 = SOF FRAME write strobe 1 GPIO1/TXD R/W GPIO1/TXD Output Select Mux 0 = GPIO1 1 = P3.1 0 GPIO0/RXD R/W P3.0 RXD/GPIO0 Input Select Mux 0 = RXD<=GPIO0 1 = RXD<='0' Note 1: In Counter mode, the 8051 must sample T[1:0] as a '1' in one instruction cycle, and then '0' in the next. So for 12MHz, the SOF Pulse must be active for at least 1us. Note 2: Missing SOF packets can be reconstructed by using the Timer mode to count the number of 8051 instruction cycles since the last valid Frame was received. Note 3: A GPIO can be used to output nSOF pulses. This can be done by configuring a GPIO as an output and writing to the GPIO out register to generate low pulses each time a SOF packet is received. |
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