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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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BLUENRG-2 датащи(PDF) 111 Page - STMicroelectronics |
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BLUENRG-2 датащи(HTML) 111 Page - STMicroelectronics |
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111 / 190 page  BlueNRG-2 Functional details DocID030675 Rev 2 111/190 Address offset Name RW Reset Description 0x10 IRQRAW RW 0x00000000 Status interrupts (unmasked). Refer to the detailed description below. 0x14 SIZE R 0x00000000 Indicates the last usable address of the main Flash 0x18 ADDRESS RW 0x00000000 Address for programming Flash, will auto- increment 0x24 LFSRVAL R 0xFFFFFFFF LFSR register needed for check after MASS READ command 0x28 TIMETRIM1 RW 0x0B061515 Trimming values for Flash erase/modify sequences 0x2C TIMETRIM2 RW 0x0B156506 Trimming values for Flash erase/modify sequences 0x30 TIMETRIM3 RW 0x00000011 Trimming values for Flash wake-up sequence 0x40 DATA0 RW 0xFFFFFFFF Program cycle data 0x44 DATA1 RW 0xFFFFFFFF Program cycle data 0x48 DATA2 RW 0xFFFFFFFF Program cycle data 0x4C DATA3 RW 0xFFFFFFFF Program cycle data Table 119: FLASH – COMMAND register description: address offset FLASH_BASE_ADDR+0x00 Bit Field name Reset RW Description 31:0 COMMAND 0x00000000 RW Command for the module. Table 120: FLASH – CONFIG register description: address offset FLASH_BASE_ADDR+0x04 Bit Field name Reset RW Description 31:0 CONFIG 0x00000000 RW Configure the wrapper. Table 121: FLASH - IRQSTAT register description: address offset FLASH_BASE_ADDR+0x08 Bit Field name Reset RW Description 0 CMDDONE 0x0 RW Command is done. 1: clear the interrupt pending bit. 1 CMDSTART 0x0 RW Command is started.1: clear the interrupt pending bit. 2 CMDERR 0x0 RW Command written while BUSY. 1: clear the interrupt pending bit. 3 ILLCMD 0x0 RW Illegal command written. 1: clear the interrupt pending bit. 4 READOK 0x0 RW Mass read was OK. 1: clear the interrupt pending bit. 5 FLNREADY 0x0 RW Flash not ready (sleep). 1: clear the interrupt pending bit. 31:6 RESERVED 0x0 R RESERVED |
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