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BLUENRG-2 датащи(PDF) 37 Page - STMicroelectronics |
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BLUENRG-2 датащи(HTML) 37 Page - STMicroelectronics |
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37 / 190 page ![]() BlueNRG-2 Functional details DocID030675 Rev 2 37/190 Bit Field name Reset RW Description 7:6 OSR 0x3 RW Set the oversampling ratio. 00b: Set the oversampling ratio to 200(1) 01b: Set the oversampling ratio to 100 10b: Set the oversampling ratio to 64 11b: Set the oversampling ratio to 32 9:8 PGASEL 0x3 RW Set the input attenuator value: 000b: Input attenuator at 0 dB 001b: Input attenuator at 6.02 dB 010b: Input attenuator at 9.54 dB 10 RESERVED 0x1 R RESERVED 11 CONT 0x1 RW Enable the continuous conversion mode: 0: Single conversion 1: Continuous conversion 17:12 RESERVED 0x3F R RESERVED 18 SKIP 0x1 RW It permits to bypass the filter comb to speed up the conversion for signal at low frequency: 0: Filter for comb not bypassed 1: Filter for comb bypassed 19 RESERVED 0x1 R RESERVED 20 DIG_FILT_CLK 0x1 RW Frequency clock selection value on GPIO0 when MIC_SEL=1: 0: 0.8 MHz 1: 1.6 MHz 21 DIS_WKP_WAIT 0x1 RW Disable the wake-up timer before to start the conversion from input: 0: Do not disable the wake up time before conversion 1: Disable the wake up time before conversion 22 MIC_SEL 0x1 RW Provides the clock on GPIO: 0: Do not provided any external clock source 1: Provide clock source from GPIO 31:23 RESERVED 0x1FF R RESERVED Notes: (1)Best value for sampling DC signals. Table 34: ADC - IRQSTAT register description: address offset ADC_BASE_ADDR+0x08 Bit Field name Reset RW Description 0 ENDCAL 0x0 R 1: when the calibration is completed. Clear on register read. 1 BUSY 0x0 R 1: during conversion. Clear on register read if BUSY condition no more active. 2 EOC 0x0 R 1: when the conversion is completed. Clear on register read. 3 WDOG 0x0 R 1: when the data is within the thresholds. Clear on register read. |
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