BLUENRG-2 datasheet(89/190 Pages) STMICROELECTRONICS

89 / 190 page

BlueNRG-2

Functional details

DocID030675 Rev 2

89/190

Bit

Field name

Reset

Description

SPECHAR

0x0

Special character detection bit.

0: Special character detection disabled.

1: Special character detection enabled.

31:7

RESERVED

0x0

RESERVED

Table 94: UART - XON1 register description: address offset UART_BASE_ADDR+0x54

Bit

Field name

Reset

Description

7:0

XON1

0x0

Value of Xon1 character used in the software flow control

31:8

RESERVED

0x0

RESERVED

Table 95: UART - XON2 register description. Address offset UART_BASE_ADDR+0x58.

Bit

Field name

Reset

Description

7:0

XON2

0x0

Value of Xon2 character used in the software flow control

31:8

RESERVED

0x0

RESERVED

Table 96: UART - XOFF1 register description. Address offset UART_BASE_ADDR+0x5C.

Bit

Field name

Reset

Description

7:0

XOFF1

0x0

Value of Xoff1 character used in the software flow control

31:8

RESERVED

0x0

RESERVED

Table 97: UART - XOFF2 register description. Address offset UART_BASE_ADDR+0x60.

Bit

Field name

Reset

Description

7:0

XOFF2

0x0

Value of Xoff2 character used in the software flow control

31:8

RESERVED

0x0

RESERVED

3.10

I²C

3.10.1

Introduction

The BlueNRG-2 integrates two I²C controllers in the QFN32 package (I2C2 and I2C1), and

one in the WCSP34 package (I2C2). The I²C controller interface is designed to support the

physical and data link layer according to I²C standard revision 3.0 and provides a low-cost

interconnection between ICs.

Main features are:



Up to 400 Kb/s in fast mode and up to 100 Kb/s in standard mode.



Operating modes supported are master mode, slave mode, master/slave mode for

multi-master system with bus arbitration.



Programmable 7-bit or 10-bit addressing (also with combined formats).



Programmable start byte procedure.



16-byte depth RX FIFO and 16-byte depth TX FIFO.



Spike digital filtering on the SDA and SCL lines.



Control timing constraint defined by the I²C standard.



Support for Direct Memory Access (DMA).

BLUENRG-2 датащи(PDF) 89 Page - STMicroelectronics

BLUENRG-2 датащи(HTML) 89 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL