| поискавой системы для электроныых деталей |
|
BLUENRG-2 датащи(PDF) 106 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
BLUENRG-2 датащи(HTML) 106 Page - STMicroelectronics |
|
106 / 190 page ![]() Functional details BlueNRG-2 106/190 DocID030675 Rev 2 Bit Field name Reset RW Description 25 BERRIC 0x0 RW Bus Error interrupt clear. 0: Has no effect. 1: Clears interrupt pending. 27:26 RESERVED 0x0 R RESERVED 28 MTDWSIC 0x0 RW Master transaction done without stop interrupt clear. 0: Has no effect. 1: Clears interrupt pending. 31:29 RESERVED 0x0 R RESERVED Table 113: I2C - THDDAT register description: address offset I2CX_BASE_ADDR+0x4C Bit Field name Reset RW Description 8:0 THDDAT 0x14 RW Hold time data value. In master or slave mode, when the I2C controller detects a falling edge in the SCL line, the counter, which is loaded by the THDDAT, is launched. Once the THDDAT value is reached, the data is transferred. 31:9 RESERVED 0x0 R RESERVED Table 114: I2C - THDSTA_FST_STD register description: address offset I2CX_BASE_ADDR+0x50 Bit Field name Reset RW Description 8:0 THDSTA_STD 0xE2 RW Hold time start condition value for standard mode. When the start condition is asserted, the decimeter loads the value of THDSTA_STD for standard mode, once the THDSTA_STD value is reached, the SCL line asserts low. 15:9 RESERVED 0x0 R RESERVED 24:16 THDSTA_FST 0x3F RW Hold time start condition value for fast mode. When the start condition is asserted, the decimeter loads the value of THDSTA_FST for fast mode, once the THDSTA_FST value is reached, the SCL line assert slow. 31:25 RESERVED 0x0 R RESERVED Table 115: I2C - TSUSTA_FST_STD register description: address offset I2CX_BASE_ADDR+0x58 Bit Field name Reset RW Description 8:0 TSUSTA_STD 0xE2 RW Setup time start condition value for standard mode. After a non-stop on the SCL line the decimeter loads the value of TSUSTA_STD according to standard mode. Once the counter is expired, the start condition is generated. 15:9 RESERVED 0x0 R RESERVED 24:16 TSUSTA_FST 0x1D RW Setup time start condition value for fast mode. After a non- stop on the SCL line the decimeter loads the value of TSUSTA_FST according to fast mode. Once the counter is expired the start condition is generated. 31:25 RESERVED 0x0 R RESERVED |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |