BLUENRG-2 datasheet(101/190 Pages) STMICROELECTRONICS

101 / 190 page

BlueNRG-2

Functional details

DocID030675 Rev 2

101/190

Table 110: I2C - RISR register description: address offset I2CX_BASE_ADDR+0x30

Bit

Field name

Reset

Description

TXFE

0x1

TX FIFO empty. TXFE is set when TX FIFO is empty. This bit

is self-cleared by writing in TX FIFO.

0: TX FIFO is not empty.

1: TX FIFO is empty.

TXFNE

0x1

TX FIFO nearly empty. TXFNE is set when the number of

entries in TX FIFO is less than or equal to the threshold value

programmed in the I2C_TFTR:THRESHOLD_TX register. It is

self-cleared when the threshold level is over the programmed

threshold.

0: Number of entries in TX FIFO greater than the

TFTR:THRESHOLD_TX register.

1: Number of entries in TX FIFO less than or equal to the

TFTR:THRESHOLD_TX register.

TXFF

0x0

TX FIFO full. TXFF is set when a full condition occurs in TX

FIFO. This bit is self-cleared when the TX FIFO is not full:

0: TX FIFO is not full.

1: TX FIFO is full.

TXFOVR

0x0

TX FIFO overrun. TXFOVR is set when a write operation in TX

FIFO is performed and TX FIFO is full. The application must

avoid an overflow condition by a proper data flow control.

Anyway in case of overrun, the application shall flush the

transmitter (CR:FTX bit to set) because the TX FIFO content

is corrupted (at least one word has been lost in FIFO). This

interrupt is cleared by setting the related bit of the ICR

0: No overrun condition occurred in TX FIFO.

1: Overrun condition occurred in TX FIFO.

RXFE

0x1

RX FIFO empty. RXFE is set when the RX FIFO is empty.

This bit is self-cleared when the slave RX FIFO is not empty:

0: RX FIFO is not empty..

1: RX FIFO is empty..

RXFNF

0x0

RX FIFO nearly full. RXFNF is set when the number of entries

in RX FIFO is greater than or equal to the threshold value

programmed in the RFTR:THRESHOLD_RX register. Its self-

cleared when the threshold level is under the programmed

threshold:

0: Number of entries in the RX FIFO less than the

RFTR:THRESHOLD_RX register.

1: Number of entries in the RX FIFO greater than or equal to

the RFTR:THRESHOLD_RX register.

RXFF

0x0

RX FIFO full. RXFF is set when a full condition occurs in RX

FIFO. This bit is self-cleared when the data are read from the

RX FIFO.

0: RX FIFO is not full.

1: RX FIFO is full.

15:7

RESERVED

0x0

RESERVED

BLUENRG-2 датащи(PDF) 101 Page - STMicroelectronics

BLUENRG-2 датащи(HTML) 101 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL