ADP1055ACPZ-R7 datasheet(113/140 Pages) AD

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Data Sheet

ADP1055

Rev. A | Page 113 of 140

Bits

Bit Name

R/W

Description

[3:2]

VOUT_OV sampling

R/W

Bit 3

Bit 2

Sampling

One sample sets the VOUT_OV flag (80 μs sampling period)

Two consecutive samples that read a value greater than the one set in

VOUT_OV_FAULT_LIMIT set the VOUT_OV flag (160 μs sampling period)

Three consecutive samples that read a value greater than the one set in

VOUT_OV_FAULT_LIMIT set the VOUT_OV flag (240 μs sampling period)

Four consecutive samples that read a value greater than the one set in

VOUT_OV_FAULT_LIMIT set the VOUT_OV flag (320 μs sampling period)

[1:0]

Reserved

Table 191. Register 0xFE4E—CS1_SETTING

Bits

Bit Name

R/W

Description

Reserved

Reserved.

[6:4]

CS1 fast OCP blanking

R/W

Set the CS1 fast OCP blanking time to 0 ns, 40 ns, 80 ns, 120 ns, 200 ns, 400 ns, 600 ns,

or 800 ns.

CS1 fast OCP bypass

R/W

Setting this bit means that the GPIO1 pin is used for CS1 fast OCP instead of the CS1 pin.

[2:0]

CS1 fast OCP timeout

R/W

Set the number of consecutive switching cycles with a CS1 OCP condition before the

IIN_OC_FAST_FAULT flag is set: 1, 4, 16, 128, 256, 384, 512, or 1024.

Table 192. Register 0xFE4F—CS2_SETTING

Bits

Bit Name

R/W

Description

CC turbo mode

R/W

Reduces the CS2 average time from 328 μs to 41 μs for CC mode.

[6:4]

CS2 fast OCP

timeout

R/W

Sets the number of consecutive switching cycles with a CS2 OCP condition before the

IOUT_OC_FAST_FAULT flag is set: 1, 4, 16, 128, 256, 384, 512, or 1024.

Peak constant

current mode

R/W

When this bit is set, CS2 fast OCP cycle-by-cycle protection on OUTA to OUTD is disabled. The CS2 fast

OCP timeout is still active.

Average constant

current disable

R/W

0 = average constant current mode is enabled/disabled, as defined by PMBus.

Threshold = IOUT_OC_FAULT_LIMIT.

ILIM = IOUT_OC_FAULT_LIMIT × (100 + percentage), where percentage and polarity are defined in

1 = average constant current mode is always on (not PMBus compliant).

Threshold = ILIM = IOUT_OC_FAULT_LIMIT × (100 ± percentage), where percentage and polarity are

defined in Register 0xFE5D[3:0].

Current fault response defaults to these settings (Response Bits[7:6]).

00 = ignore fault.

01 = ignore fault.

10 = ignore fault.

11 = shut down, disable the output, and respond as programmed in retry setting (Bits[5:3]).

[1:0]

CS2 range

R/W

Sets the CS2 ADC range.

Bit 1

Bit 0

ADC Range (mV)

30 (low-side sensing)

60 (low-side sensing)

480 (high-side sensing)

Reserved

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