ADP1055ACPZ-R7 datasheet(90/140 Pages) AD

90 / 140 page

ADP1055

Data Sheet

Rev. A | Page 90 of 140

Bits

Bit Name

R/W

Description

[2:0]

t2, t4, t6, t8, t10, t12

offset

R/W

This value multiplied by Register 0xFE1D[2:0] determines the offset for t2, t4, t6, t8, t10, t12 from

nominal timing at no load.

Bit 2

Bit 1

Bit 0

Offset (ns)

Table 149. Register 0xFE23, Register 0xFE24—SR1_DEAD_TIME, SR2_DEAD_TIME (Requires Use of the GO Bit in Register 0xFE00)

Bits

Bit Name

R/W

Description

t9, t11 polarity

R/W

0 = positive polarity.

1 = negative polarity.

[6:4]

t9, t11 offset

R/W

This value multiplied by Register 0xFE1D[2:0] determines the offset for t1, t3, t5, t7, t9, t11 from

nominal timing at no load.

Bit 6

Bit 5

Bit 4

Offset (ns)

t10, t12 polarity

R/W

0 = positive polarity.

1 = negative polarity.

[2:0]

t10, t12 offset

R/W

This value multiplied by Register 0xFE1D[2:0] determines the offset for t2, t4, t6, t8, t10, t12 from

nominal timing at no load.

Bit 2

Bit 1

Bit 0

Offset (ns)

Table 150. Register 0xFE25—VSBAL_SETTING (Requires Use of the GO Bit in Register 0xFE00)

Bits

Bit Name

R/W

Description

Reserved

Reserved.

Volt-second balance

enable

R/W

Setting this bit enables volt-second balance for the main transformer (used for full-bridge

configurations).

Reserved

Set to 0 for proper operation.

Volt-second disable

during soft start

R/W

0 = do not blank volt-second balance control during soft start (recommended).

1 = blank volt-second balance control during soft start.

Reserved

Reserved.

Reserved

Reserved.

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