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PCI1221 датащи(PDF) 101 Page - Texas Instruments |
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PCI1221 датащи(HTML) 101 Page - Texas Instruments |
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101 / 123 page ![]() 101 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ExCA card detect and general-control register (index 16h) Bit 7 6 5 4 3 2 1 0 Name ExCA I/O card detect and general control Type R R W R/W R R R/W R Default X X 0 0 0 0 0 0 Register: ExCA card detect and general control Type: Read only, write only, read/write (see individual bit descriptions) Offset: CardBus socket address + 816h; Card A ExCA offset 16h Card B ExCA offset 56h Default: XX00 0000b Description: This register controls how the ExCA registers for the socket respond to card removal, as well as reports the status of VS1 and VS2 at the PC Card interface. See Table 50 for a complete description of the register contents. Table 50. ExCA Card Detect and General-Control Register (Index 16h) BIT SIGNAL TYPE FUNCTION 7 VS2STAT R VS2 state. Bit 7 reports the current state of VS2 at the PC Card interface and, therefore, does not have a default value. 0 = VS2 low 1 = VS2 high 6 VS1STAT R VS1 state. Bit 6 reports the current state of VS1 at the PC Card interface and, therefore, does not have a default value. 0 = VS1 low 1 = VS1 high 5 SWCSC W Software card detect interrupt. If the card detect enable bit in the card status change interrupt configuration register is set, writing a 1 to bit 5 causes a card-detect card-status change interrupt for the associated card socket. If the card detect enable bit is cleared to 0 in the card status change interrupt configuration register, writing a 1 to the software card detect interrupt bit has no effect. Bit 5 is write only. A read operation of this bit always returns 0. 4 CDRESUME R/W Card detect resume enable. If bit 4 is set to 1, then once a card detect change has been detected on CD1 and CD2 inputs, RI_OUT goes from high to low. RI_OUT remains low until the card status change bit in the card status change register is cleared. If this bit is a 0, then the card detect resume functionality is disabled. 0 = Card detect resume disabled (default) 1 = Card detect resume enabled 3-2 RSVD R Reserved. Bits 3-2 are read only and return 0s when read. Write transactions have no effect. 1 REGCONFIG R/W Register configuration on card removal. Bit 1 controls how the ExCA registers for the socket react to a card removal event. This bit is encoded as: 0 = No change to ExCA registers on card removal (default) 1 = Reset ExCA registers on card removal 0 RSVD R Reserved. Bit 0 is read only and returns 0 when read. Write transactions have no effect. |
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