PCI1221 datasheet(95/123 Pages) TI

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ExCA memory window 0–4 start-address high-byte register (index 11h, 19h, 21h, 29h, 31h)

Bit

Name

ExCA memory window 0–4 start-address high byte

Type

R/W

Default

ExCA memory window 0 start-address high byte

Offset:

CardBus socket address + 811h; Card A ExCA offset 11h

Card B ExCA offset 51h

ExCA memory window 1 start-address high byte

Offset:

CardBus socket address + 819h; Card A ExCA offset 19h

Card B ExCA offset 59h

ExCA memory window 2 start-address high byte

Offset:

CardBus socket address + 821h; Card A ExCA offset 21h

Card B ExCA offset 61h

ExCA memory window 3 start-address high byte

Offset:

CardBus socket address + 829h; Card A ExCA offset 29h

Card B ExCA offset 69h

ExCA memory window 4 start-address high byte

Offset:

CardBus socket address + 831h; Card A ExCA offset 31h

Card B ExCA offset 71h

Type:

Read/write

Default:

00h

Size:

One byte

Description: These registers contain the high nibble of the 16-bit memory window start address for memory

windows 0, 1, 2, 3, and 4. The lower four bits of these registers correspond to bits A23–A20 of

the start address. In addition, the memory window data width and wait states are set in

this register. See Table 47 for a complete description of the register contents.

Table 47. ExCA Memory Window 0–4 Start-Address High-Byte Register (Index 11h, 19h, 21h, 29h, 31h)

BIT

SIGNAL

TYPE

FUNCTION

DATASIZE

R/W

Data size. Bit 7 controls the memory window data width. This bit is encoded as:

0 = Window data width is 8 bits (default).

1 = Window data width is 16 bits.

ZEROWAIT

R/W

Zero wait state. Bit 6 controls the memory window wait state for 8- and 16-bit accesses. This wait-state

timing emulates the ISA wait state used by the Intel 82365SL-DF. This bit is encoded as:

0 = 8- and 16-bit cycles have standard length (default).

1 = 8-bit cycles are reduced to equivalent of three ISA cycles.

16-bit cycles are reduced to equivalent of two ISA cycles.

5-4

SCRATCH

R/W

Scratch pad bits. Bits 5-4 are read/write and have no effect on memory window operation.

3-0

STAHN

R/W

Start-address high nibble. Bits 3-0 represent the upper address bits A23–A20 of the memory window

start address.

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