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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PCI1221 датащи(PDF) 80 Page - Texas Instruments |
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PCI1221 датащи(HTML) 80 Page - Texas Instruments |
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80 / 123 page  80 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ExCA compatibility registers (functions 0 and 1) The ExCA registers implemented in the PCI1221 are register-compatible with the Intel 82365SL–DF PCMCIA controller. ExCA registers are identified by an offset value that is compatible with the legacy I/O index/data scheme used on the Intel 82365 ISA controller. The ExCA registers are accessed through this scheme by writing the register offset value into the index register (I/O base) and reading or writing the data register (I/O base + 1). The I/O base address used in the index/data scheme is programmed in the PC Card 16-Bit I/F legacy mode base address register, which is shared by both card sockets. The offsets from this base address run contiguous from 00h to 3Fh for socket A, and from 40h to 7Fh for socket B. Refer to Figure 21 for an ExCA I/O mapping illustration. CardBus Socket/ExCA Base Address 16-Bit Legacy-Mode Base Address 10h 44h 00h 3Fh Offset Index Host I/O Space Data PC Card A ExCA Registers PC Card B ExCA Registers 40h 7Fh NOTE: The 16-bit legacy mode base address register is shared by functions 0 and 1 as indicated by the shading. PCI1221 Configuration Registers Offset Figure 21. ExCA Register Access Through I/O |
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