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ExCA card status-change-interrupt configuration register (index 05h)

Bit

Name

ExCA status-change-interrupt configuration

Type

R/W

Default

ExCA card status-change-interrupt configuration

Type:

Read/write (see individual bit descriptions)

Offset:

CardBus socket address + 805h; Card A ExCA offset 05h

Card B ExCA offset 45h

Default:

00h

Description: This register controls interrupt routing for card status-change interrupts, as well as masking

CSC interrupt sources. See Table 44 for a complete description of the register contents.

Table 44. ExCA Card Status-Change-Interrupt Configuration Register (Index 05h)

BIT

SIGNAL

TYPE

FUNCTION

7-4

CSCSELECT

R/W

Interrupt select for card status change. Bits 7-4 select the interrupt routing for card status change

interrupts. This field is encoded as:

0000 = No interrupt routing (default)

0001 = IRQ1 enabled

0010 = SMI enabled

0011 = IRQ3 enabled

0100 = IRQ4 enabled

0101 = IRQ5 enabled

0110 = IRQ6 enabled

0111 = IRQ7 enabled

1000 = IRQ8 enabled

1001 = IRQ9 enabled

1010 = IRQ10 enabled

1011 = IRQ11 enabled

1100 = IRQ12 enabled

1101 = IRQ13 enabled

1110 = IRQ14 enabled

1111 = IRQ15 enabled

CDEN

R/W

Card detect enable. Bit 3 enables interrupts on CD1 or CD2 changes. This bit is encoded as:

0 = Disables interrupts on CD1 or CD2 line changes (default)

1 = Enables interrupts on CD1 or CD2 line changes

READYEN

R/W

Ready enable. Bit 2 enables/disables a low-to-high transition on PC Card READY to generate a host

interrupt. This interrupt source is considered a card status change. This bit is encoded as:

0 = Disables host interrupt generation (default)

1 = Enables host interrupt generation

BATWARNEN

R/W

Battery Warning Enable. Bit 1 enables/disables a battery warning condition to generate a CSC interrupt.

This bit is encoded as:

0 = Disables host interrupt generation (default)

1 = Enables host interrupt generation

BATDEADEN

R/W

Battery dead enable. Bit 0 enables/disables a battery dead condition on a memory PC Card or assertion

of the STSCHG I/O PC Card signal to generate a CSC interrupt.

0 = Disables host interrupt generation (default)

1 = Enables host interrupt generation

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