PCI1221 datasheet(68/123 Pages) TI

68 / 123 page

PCI1221 GHK/PDV

PC CARD CONTROLLERS

SCPS042 – JULY 1998

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

diagnostic register

Bit

Name

Diagnostic

Type

R/W

Default

Diagnostic

Type:

Read/write

Offset:

93h (functions 0, 1)

Default:

61h

Description: The diagnostic register is provided for internal TI test purposes. It is a read/write register, but

only 0s should be written to this register. See Table 26 for a complete description of the

Table 26. Diagnostic Register

BIT

SIGNAL

TYPE

FUNCTION

7†

TRUE_VAL

R/W

This bit defaults to 0. This bit is encoded as:

0 = Reads true values in PCI Vendor ID and PCI Device ID registers (default)

1 = Reads all 1’s in reads to the PCI Vendor ID and PCI Device ID registers

6-5

RSVD

R/W

Reserved. These bits are reserved for TI internal test purposes. The value of these bits should not be

changed for normal operation.

4†

DIAG4

R/W

Diagnostic RETRY_DIS. Delayed transaction disable.

3†

DIAG3

R/W

Diagnostic RETRY_EXT. Extends the latency from 16 to 64.

2†

DIAG2

R/W

Diagnostic DISCARD_TIM_SEL_CB. Set = 210, reset = 215.

1†

DIAG1

R/W

Diagnostic DISCARD_TIM_SEL_PCI. Set = 210, reset = 215.

ASYNC

R/W

Asynchronous interrupt enable.

0 = CSC interrupt is not generated asynchronously

1 = CSC interrupt is generated asynchronously (default)

† These bits are global and should be accessed only through function 0.

PCI1221 датащи(PDF) 68 Page - Texas Instruments

PCI1221 датащи(HTML) 68 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL