PCI1221 datasheet(72/123 Pages) TI

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power-management control/status register bridge support extensions

Bit

Name

Power-management control/status register bridge support extensions

Type

Default

Power-management control/status register bridge support extensions

Type:

Read only

Offset:

A6h (functions 0, 1)

Default:

00h

Description: The power-management control/status register bridge support extensions support PCI bridge

specific functionality. See Table 29 for a complete description of the register contents.

Table 29. Power-Management Control/Status Register Bridge Support Extensions

BIT

SIGNAL

TYPE

FUNCTION

BPCC_EN

Bus power/clock control. When read, bit 7 returns 1b.

B2_B3

B2/B3 support for D3hot. ThIs bit is read only and returns a 0 when read.

5–0

RSVD

Reserved. These bits are read only and return 0s when read.

power management data register

Bit

Name

power management data

Type

Default

Power management data

Type:

Read only

Offset:

A7h (functions 0, 1)

Default:

00h

Description: The power management data register is read only and returns zeros when read, since the

CardBus functions do not report dynamic data.

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