XIO2001IPNP datasheet(116/145 Pages) TI2

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9.2.1.2 Detailed Design Procedure

9.2.1.2.1 PCI Bus Interface

The XIO2001 has a 32-bit PCI interface that can operate at 25 MHz, 33 MHz, 50 MHz or 66 MHz. This interface

is compliant with the PCI Local Bus Specification , Revision 2.3 and 3.0. The remainder of this section describes

implementation considerations for the XIO2001 secondary PCI bus interface.

• AD31:0, C/ BE[3:0], PAR, DEVSEL, FRAME, STOP, TRDY, PERR, SERR, and IRDY are required signals

and must be connected to each PCI bus device. The maximum signal loading specification for a 66 MHz bus

is 30 pF and for a 33 MHz bus is 50 pF. PCI bus approved pullup resistors connected to VCCP are needed on

the following terminals: IRDY, TRDY, FRAME, STOP, PERR, SERR, and DEVSEL.

• The XIO2001 supports up to six external PCI bus devices with individual CLKOUT, REQ, and GNT signals.

An internal PCI bus clock generator function provides six low-skew clock outputs. Plus, there are six REQ

inputs and six GNT outputs from the internal PCI bus arbiter. Each PCI bus device connects to one CLKOUT

signal, one REQ signal, and one GNT signal. All three signals are point-to- point connections. Unused

CLKOUT signals can be disabled by asserting the appropriate CLOCK_DISABLE bit in the clock control

GNT signals are no connects.

• An external clock feedback feature is provided to de-skew PCI bus clocks. Connecting the CLKOUT[6]

terminal to the CLK terminal is required if any of the other six CLKOUT[5:0] terminals are used to clock PCI

bus devices. The CLKOUT signals should be slightly longer than the longest synchronous PCI bus signal

trace. Figure 9-2 illustrates the external PCI bus clock feedback feature. The use of series resistors on the

seven PCI bus clocks should be considered to reduce circuit board EMI.

Note

There is one exception to this length matching rule associated with connecting a CLKOUT signal to

PCI socket. For this case, the CLKOUT signal connected to a PCI socket should be 2.5 inches

shorter than the other CLKOUT signals.

XIO2001

VCCP

PCI Device

PCI Bus

M66EN pullup resistor enables

50/66 MHz by default.

Pulldown used if bus is known

to be 25/33 M z.

CLKOUT0

PCLK66_SEL

M66EN

CLK

CLKOUT6

CLKOUT[5:1]

Feedback clock from CLKOUT6

should be slightly longer than

the longest CLK provided to a

downstream device. A 50

dampening resistor can be

used to reduce reflection.

Unused PCI clocks can be left

floating and disabled via PCI

power and noise.

When connected to add-in

card slots, 33 MHz cards will

force M66EN to ground to

indicate 33 M z only

operation.

When pulled high, standard

33/66 MHz clocks are

provided (based on M66EN).

When pulled low 25/50 MHz

clocks are provided (based on

M66EN).

Figure 9-2. External PCI Bus Clock Configuration

• The XIO2001 has options providing for four different PCI clock frequencies: 25 MHz, 33 MHz, 50 MHz, and

66MHz. The clock frequency provided is determined by the states of the M66EN and PCLK66_SEL terminals

at the de-assertion of PERST.

XIO2001

SCPS212J – MAY 2009 – REVISED JANUARY 2021

www.ti.com

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