XIO2001IPNP datasheet(18/145 Pages) TI2

18 / 145 page

PARAMETER

TERMINALS

MIN

NOM

MAX

UNIT

COMMENTS

VTX-IDLE-DIFF-AC-p

Electrical idle differential peak output

voltage

TXP, TXN

VTX-IDLE-DIFFp = |VTXP-Idle – VTXN-Idle| ≤ 20 mV

VTX-RCV-DETECT

The amount of voltage change allowed

during receiver detection

TXP, TXN

600

The total amount of voltage change that a transmitter can

apply to sense whether a low impedance receiver is

present.

TTX-IDLE-MIN

Minimum time spent in electrical idle

TXP, TXN

Minimum time a transmitter must be in electrical idle.

TTX-IDLE-SET-TO-IDLE

Maximum time to transition to a valid

electrical idle after sending an EIOS

TXP, TXN

After sending the required number of EIOSs, the

transmitter must meet all electrical idle specifications

within this time. This is measured from the end of the last

EIOS to the transmitter in electrical idle.

TTX-IDLE-TO-DIFF-DATA

Maximum time to transition to a valid diff

signaling after leaving electrical idle

TXP, TXN

Maximum time to transistion to valid diff signaling after

leaving electrical idle. This is considered a debounce time

to the Tx.

CTX

AC coupling capacitor

TXP, TXN

200

All transmitters shall be AC coupled. The AC coupling is

required either within the media or within the transmitting

component itself.

(1)

SCC permits a 0, –5000 ppm modulation of the clock frequency at a modulation rate not to exceed 33 kHz.

(2)

Measurements at 2.5 GT/s require a scope with at least 6.2 GHz bandwidth. 2.5 GT/s may be measured within 200 mils of Tx device's

pins, although deconvolution is recommended.

(3)

Transmitter jitter is measured by driving the transmitter under test with a low jitter "ideal" clock and connecting the DUT to a reference

board.

(4)

Transmitter raw jitter data must be convolved with a filtering function that represents the worst case CDR tracking BW. After the

convolution process has been applied, the center of the resulting eye must be determined and used as a reference point for obtaining

eye voltage and margins.

(5)

Measurement is made over at least 10 UI.

(6)

The Tx PLL Bandwidth must lie between the min and max ranges given in the above table. PLL peaking must lie below the value listed

above. Note: the PLL B/W extends from zero up to the value(s) specified in the above table.

(7)

A single combination of PLL BW and peaking is specified for 2.5 GT/s implemenations.

6.7 PCI Express Differential Receiver Input Ranges

PARAMETER

TERMINALS

MIN

NOM

MAX

UNIT

COMMENTS

UI(1)

Unit interval

RXP, RXN

399.88

400.12

Each UI is 400 ps ±300 ppm. UI does not account for

SSC dictated variations.

VRX-DIFF-PP-CC (2)

Differential input peak-to-peak voltage

RXP, RXN

0.175

1.200

VRX-DIFFp-p = 2*|VRXP – VRXN|

TRX-EYE (2) (3)

Minimum receiver eye width

RXP, RXN

0.4

The maximum interconnect media and transmitter jitter

that can be tolerated by the receiver is derived as TRX-

MAX-JITTER = 1 – TRX-EYE = 0.6 UI

TRX-EYE-MEDIAN-to-MAX-JITTER (2) (3)

Maximum time between the jitter median

and maximum deviation from the median

RXP, RXN

0.3

Jitter is defined as the measurement variation of the

crossing points (VRX-DIFFp-p = 0 V) in relation to

recovered TX UI. A recovered TX UI is calculated over

3500 consecutive UIs of sample data. Jitter is

measured using all edges of the 250 consecutive UIs in

the center of the 3500 UIs used for calculating the TX

UI.

BWRX-PLL-HI (6)

Maximum Rx PLL bandwidth

RXP, RXN

MHz

Second order PLL jitter transfer bounding function.

BWRX-PLL-LO-3DB (6)

Minimum Rx PLL for 3 dB peaking

RXP, RXN

1.5

MHz

Second order PLL jitter transfer bounding function.

VRX-CM-AC-P (2)

AC peak common mode input voltage

RXP, RXN

150

VRX-CM-AC-P = RMS(|VRXP + VRXN|/2 – VRX-CM-DC)

VRX-CM-DC = DC(avg) of |VRXP + VRXN|/2.

RLRX-DIFF (4)

Differential return loss

RXP, RXN

Measured over 50 MHz to 1.25 GHz with the P and N

lines biased at +300 mV and –300 mV, respectively.

RLRX-CM (4)

Common mode return loss

RXP, RXN

Measured over 50 MHz to 1.25 GHz with the P and N

lines biased at +300 mV and –300 mV, respectively.

ZRX-DIFF-DC (5)

DC differential input impedance

RXP, RXN

120

Ω

RX dc differential mode impedance

ZRX-DC (4) (5)

DC input impedance

RXP, RXN

Ω

Required RXP as well as RXN dc impedance (50 Ω

±20% tolerance).

XIO2001

SCPS212J – MAY 2009 – REVISED JANUARY 2021

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