1 Features
• Full ×1 PCI Express™ Throughput
• Fully Compliant With PCI Express to PCI/PCI-X
Bridge Specification, Revision 1.0
• Fully Compliant With PCI Express Base
Specification, Revision 2.0
• Fully Compliant With PCI Local Bus Specification,
Revision 2.3
• PCI Express Advanced Error Reporting Capability
Including ECRC Support
• Support for D1, D2, D3hot, and D3cold
• Active-State Link Power Management Saves
Power When Packet Activity on the PCI Express
Link is Idle, Using Both L0s and L1 States
• Wake Event and Beacon Support
• Error Forwarding Including PCI Express Data
Poisoning and PCI Bus Parity Errors
• Uses 100-MHz Differential PCI Express Common
Reference Clock or 125-MHz Single-Ended,
Reference Clock
• Optional Spread Spectrum Reference Clock is
Supported
• Robust Pipeline Architecture to Minimize
Transaction Latency
• Full PCI Local Bus 66-MHz/32-Bit Throughput
• Support for Six Subordinate PCI Bus Masters with
Internal Configurable, 2-Level Prioritization
Scheme
• Internal PCI Arbiter Supporting Up to 6 External
PCI Masters
• Advanced PCI Express Message Signaled
Interrupt Generation for Serial IRQ Interrupts
• External PCI Bus Arbiter Option
• PCI Bus LOCK Support
• JTAG/BS for Production Test
• PCI-Express CLKREQ Support
• Clock Run and Power Override Support
• Six Buffered PCI Clock Outputs (25 MHz, 33 MHz,
50 MHz, or 66 MHz)
• PCI Bus Interface 3.3-V and 5.0-V (25 MHz or
33 MHz only at 5.0 V) Tolerance Options
• Integrated AUX Power Switch Drains VAUX Power
Only When Main Power Is Off
• Five 3.3-V, Multifunction, General-Purpose I/O
Terminals
• Memory-Mapped EEPROM Serial-Bus Controller
Supporting PCI Express Power Budget/Limit
Extensions for Add-In Cards
• Compact Footprint, Lead-Free 144-Ball, ZAJ
nFBGA, Lead-Free 169-Ball ZWS nFBGA, and
PowerPad™ HTQFP 128-Pin PNP Package

2 Applications
• Enterprise systems
– Data center & enterprise computing
• Personal electronics
– PC and notebooks
• Industrial applications
– Factory automation and control
– Retail automation & payment
– Industrial transport (non-car & non-light truck)

3 Description
The XIO2001 is a single-function PCI Express to PCI
translation bridge that is fully compliant to the PCI
Express to PCI/PCI-X Bridge Specification, Revision
1.0. For downstream traffic, the bridge simultaneously
supports up to eight posted and four non-posted
transactions. For upstream traffic, up to six posted
and four non-posted transactions are simultaneously
supported.
The PCI Express interface is fully compliant to the PCI
Express Base Specification, Revision 2.0.
The PCI Express interface supports a ×1 link
operating at full 250 MB/s packet throughput in each
direction simultaneously. Also, the bridge supports the
advanced error reporting including extended CRC
(ECRC) as defined in the PCI Express Base
Specification. Supplemental firmware or software is
required to fully use both of these features.