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XIO2001IPNP датащи(PDF) 32 Page - Texas Instruments |
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XIO2001IPNP датащи(HTML) 32 Page - Texas Instruments |
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32 / 145 page ![]() Table 8-6. Type 0 Configuration Transaction IDSEL Mapping DEVICE NUMBER AD[31:16] 00000 0000 0000 0000 0001 00001 0000 0000 0000 0010 00010 0000 0000 0000 0100 00011 0000 0000 0000 1000 00100 0000 0000 0001 0000 00101 0000 0000 0010 0000 00110 0000 0000 0100 0000 00111 0000 0000 1000 0000 01000 0000 0001 0000 0000 01001 0000 0010 0000 0000 01010 0000 0100 0000 0000 01011 0000 1000 0000 0000 01100 0001 0000 0000 0000 01101 0010 0000 0000 0000 01110 0100 0000 0000 0000 01111 1000 0000 0000 0000 1xxxx 0000 0000 0000 0000 Type 1 configuration registers transactions that target a downstream bus other then the secondary bus are output on the PCI bus as type 1 PCI configuration transactions. Figure 8-2 shows the address phase of a type 1 configuration transaction on the PCI bus as defined by the PCI specification. Figure 8-2. Type 1 Configuration Transaction Address Phase Encoding XIO2001 SCPS212J – MAY 2009 – REVISED JANUARY 2021 www.ti.com 32 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: XIO2001 |
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