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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SC2200 датащи(PDF) 142 Page - National Semiconductor (TI) |
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SC2200 датащи(HTML) 142 Page - National Semiconductor (TI) |
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142 / 433 page  www.national.com 142 Revision 3.0 SuperI/O Module (Continued) Table 4-42. Bank 0 Bit Map Register Bits Offset Name 76 5432 10 00h RXD RXD[7:0] (Receiver Data Bits) TXD TXD[7:0] (Transmitter Data Bits) 01h IER1 RSVD MS_IE LS_IE TXLDL_IE RXHDL_IE IER2 RSVD TXEMP_IE RSVD3/ DMA_IE4 MS_IE LS_IE TXLDL_IE RXHDL_IE 02h EIR1 FEN[1:0] RSVD RXFT IPR1 IPR0 IPF EIR2 RSVD TXEMP_EV RSVD 3/ DMA_EV 4 MS_EV LS_EV or TXHLT_EV TXLDL_EV RXHDL_EV FCR RXFTH[1:0] TXFTH[1:0] RSVD TXSR RXSR FIFO_EN 03h LCR5 BKSE SBRK STKP EPS PEN STB WLS[1:0] BSR5 BKSE BSR[6:0] (Bank Select) 04h MCR1 RSVD LOOP ISEN or DCDLP RILP RTS DTR MCR2 RSVD TX_DFR RSVD RTS DTR 05h LSR ER_INF TXEMP TXRDY BRK FE PE OE RXDA 06h MSR DCD RI DSR CTS DDCD TERI DDSR DCTS 07h SPR1 Scratch Data ASCR2 RSVD TXUR4 RXACT4 RXWDG4 RSVD S_OET4 RSVD RXF_TOUT 1. Non-Extended Mode. 2. Extended Mode. 3. In SP1 only. 4. In SP2 only. 5. When bit 7 of this register is set to 1, bits [6:0] of BSR select the bank, as shown in Table 4-38 on page 141. Table 4-43. Bank 1 Bit Map Register Bits Offset Name 76 5432 10 00h LBGD(L) LBGD[7:0] (Low Byte) 01h LBGD(H) LBGD[15:8] (High Byte) 02h RSVD Reserved 03h LCR1 BKSE SBRK STKP EPS PEN STB WLS[1:0] BSR1 BKSE BSR[6:0] (Bank Select) 04h-07h RSVD Reserved 1. When bit 7 of this register is set to 1, bits [6:0] of BSR select the bank, as shown in Table 4-38 on page 141. |
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