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SC2200 датащи(PDF) 145 Page - National Semiconductor (TI) |
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SC2200 датащи(HTML) 145 Page - National Semiconductor (TI) |
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145 / 433 page ![]() Revision 3.0 145 www.national.com SuperI/O Module (Continued) Table 4-47. Bank Selection Encoding BSR Bits Bank Selected Functionality 76 543 210 0 x xxx xx x 0 UART + IR 1 0 xxx xx x 1 1 1 xxx x 1 x 1 1 1 xxx xx 1 1 11 100 000 2 11 100 100 3 11 101 000 4 IR Only 11 101 100 5 11 110 000 6 11 110 100 7 Table 4-48. Bank 1 Register Map Offset Type Name 00h R/W LBGD(L). Legacy Baud Generator Divisor Port (Low Byte) 01h R/W LBGD(H). Legacy Baud Generator Divisor Port (High Byte) 02h --- RSVD. Reserved 03h W LCR1. Link Control R/W BSR1. Bank Select 04h-07h --- RSVD. Reserved 1. When bit 7 of this register is set to 1, bits [6:0] of BSR select the bank, as shown in Table 4-47. Table 4-49. Bank 2 Register Map Offset Type Name 00h R/W BGD(L). Baud Generator Divisor Port (Low Byte) 01h R/W BGD(H). Baud Generator Divisor Port (High Byte) 02h R/W EXCR1. Extended Control 1 03h R/W BSR. Bank Select 04h R/W EXCR2. Extended Control 2 05h --- RSVD. Reserved 06h RO TXFLV. TX FIFO Level 07h RO RXFLV. RX FIFO Level |
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