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SC2200 датащи(PDF) 20 Page - National Semiconductor (TI) |
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SC2200 датащи(HTML) 20 Page - National Semiconductor (TI) |
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20 / 433 page ![]() www.national.com 20 Revision 3.0 Signal Definitions (Continued) 2.1 BALL ASSIGNMENTS The SC2200 is highly configurable as illustrated in Figure 2-1 on page 18. Strap options and register programming are used to set various modes of operation and specific signals on specific balls. This section describes which sig- nals are available on which balls and provides configuration information: • Figure 2-2 on page 21 and Figure 2-3 on page 36: Illus- trations of EBGA and TEPBGA ball assignments. • Table 2-2 on page 22 and Table 2-4 on page 37: Lists signals according to ball number. Power Rail, Signal Type, Buffer Type and, where relevant, Pull-Up or Pull- Down resistors are indicated for each ball in this table. For multiplexed balls, the necessary configuration for each signal is listed as well. • Table 2-3 on page 32 and Table 2-5 on page 47: Quick reference signal list sorted alphabetically - listing all signal names and ball numbers.The tables in this chapter use several common abbreviations. Table 2-1 lists the mnemonics and their meanings Notes: 1) For each GPIO signal, there is an optional pull-up resistor on the relevant ball. After system reset, the pull-up is present. This pull-up resistor can be disabled via registers in the Core Logic module. The configuration is without regard to the selected ball function (except for GPIO12, GPIO13, and GPIO16). Alternate functions for GPIO12, GPIO13, and GPIO16 control pull-up resistors. For more information, see Section 5.4.1 "Bridge, GPIO, and LPC Registers - Function 0" on page 199. 2) Configuration settings listed in this table are with regard to the Pin Multiplexing Register (PMR). See Section 3.2 "Multiplexing, Interrupt Selection, and Base Address Registers" on page 81 for a detailed description of this register. Table 2-1. Signal Definitions Legend Mnemonic Definition AAnalog AVSS Ground ball: Analog AVCC Power ball: Analog GCB General Configuration Block registers. Refer to Section 3.0 "General Configura- tion Block" on page 80. Location of the General Configuration Block cannot be determined by soft- ware. See SC2200 Thin Client On a Chip device errata. I Input ball I/O Bidirectional ball MCR[x] Miscellaneous Configuration Register Bit x: A register, located in the GCB. Refer to Section 3.1 "Configuration Block Addresses" on page 80 for further details. O Output ball OD Open-drain PD Pull-down PMR[x] Pin Multiplexing Register Bit x: A regis- ter, located in the GCB, used to config- ure balls with multiple functions. Refer to Section 3.1 "Configuration Block Addresses" on page 80 for further details. PU Pull-up TS TRI-STATE VCORE Power ball: 1.2V VIO Power ball: 3.3V VSS Ground ball # The # symbol in a signal name indicates that the active or asserted state occurs when the signal is at a low voltage level. Otherwise, the signal is asserted when at a high voltage level. / A / in a signal name indicates both func- tions are always enabled (i.e., cycle mul- tiplexed). + A + in signal name indicates the function is available on the ball, but that either strapping options or register program- ming is required to select the desired function. |
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