SC2200 datasheet(83/433 Pages) NSC

83 / 433 page

Revision 3.0

www.national.com

General Configuration Block (Continued)

TFTPP (TFT/Parallel Port). Determines whether certain balls are used for TFT or PP/ACB1/FPCI. This bit is set to 1 at

power-on if the TFT_PRSNT strap (EBGA ball AK13 / TEPBGA ball P29) is pulled high.

Ball #

0: PP/ACB1/FPCI

1: TFT

EBGA / TEPBGA

Name

Add’l Dependencies

Name

Add’l Dependencies

H2 / D10

GPIO1

PMR[13] = 0

TFTD12

None

IOCS1#

PMR[13] = 1

H3 / A9

GPIO20

PMR[7] = 0

TFTD0

None

DOCCS#

PMR[7] = 1

J4 / A10

GPIO17

PMR[5] = 0

TFTDCK

None

IOCS0#

PMR[5] = 1

T1 / B17

BUSY/WAIT#

Note 1

TFTD3

None

F_C/BE1#

Note 2

T3 / D17

Note 1

TFTD14

Note 1

F_C/BE2#

Note 2

T4 / C17

SLCT

Note 1

TFTD15

Note 1

F_C/BE3#

Note 2

U1 / A18

PD7

Note 1

TFTD13

Note 1

F_AD7

Note 2

U3 / B18

ACK#

Note 1

TFTDE

Note 1

FPCICLK

Note 2

V1 / C18

PD4

Note 1

TFTD10

Note 1

F_AD4

Note 2

V2 / C19

PD5

Note 1

TFTD11

Note 1

F_AD5

Note 2

V3 / A20

PD6

Note 1

TFTD1

Note 1

F_AD6

Note 2

W1 / B20

SLIN#/ASTRB#

Note 1

TFTD16

Note 1

F_IRDY#

Note 2

W2 / C20

PD3

Note 1

TFTD9

Note 1

F_AD3

Note 2

W3 / D20

PD2

Note 1

TFTD8

Note 1

F_AD2

Note 2

Y1 / A21

PD1

Note 1

TFTD7

Note 1

F_AD1

Note 2

Y3 / B21

INIT#

Note 1

TFTD5

Note 1

SMI_O

Note 2

AA1 / C21

PD0

Note 1

TFTD6

Note 1

F_AD0

Note 2

AA3 / D21

ERR#

Note 1

TFTD4

Note 1

F_C/BE0#

Note 2

AB1 / A22

STB#/WRITE#

Note 1

TFTD17

None

F_FRAME#

Note 2

AB2 / D22

AFD#/DSTRB#

Note 1

TFTD2

Note 1

INTR_O

Note 2

AJ13 / N31

AB1C

None

GPIO20

PMR[7] = 0

DOCCS#

PMR[7] = 1

AL12 / N30

AB1D

None

GPIO1

PMR[13] = 0

IOCS1#

PMR[13] = 1

AL16 / V30

GXCLK

PMR[29] = 0

FP_VDD_ON

None

TEST3

PMR[29] = 1

Note:

1. PMR[27] = 0 and FPCI_MON = 0

2. PMR[27] = 1 or FPCI_MON = 1

3. ACCESS.bus interface 1 is not available if PMR[23] = 1.

4. If FPCI_MON strap is enabled, the TFT_PRSNT strap should pulled low.

RSVD (Reserved). Must be set equal to PMR[14] (LPCSEL). The LPC_ROM strap (EBGA ball E4 / TEPBGA ball D6) deter-

mines the power-on reset (POR) state of PMR[14] and PMR[22].

Table 3-2. Multiplexing, Interrupt Selection, and Base Address Registers (Continued)

Bit

Description

SC2200 датащи(PDF) 83 Page - National Semiconductor (TI)

SC2200 датащи(HTML) 83 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL