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SC2200 датащи(PDF) 15 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
номер детали SC2200
подробное описание детали  Thin Client On a Chip
PDF  433 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

SC2200 датащи(HTML) 15 Page - National Semiconductor (TI)

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Revision 3.0
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Architecture Overview (Continued)
GX_BASE+8414h-8417h
MC_GBASE_ADD (R/W)
Reset Value: 00000000h
31:18
RSVD (Reserved). Write as 0.
17
TE (Test Enable TEST[3:0]).
0: TEST[3:0] are driven low (normal operation).
1: TEST[3:0] pins are used to output test information
16
TECTL (Test Enable Shared Control Pins).
0: RASB#, CASB#, CKEB, WEB# (normal operation).
1: RASB#, CASB#, CKEB, WEB# are used to output test information
15:12
SEL (Select). This field is used for debug purposes only and should be left at zero for normal operation.
11
RSVD (Reserved). Write as 0.
10:0
GBADD (Graphics Base Address). This field indicates the graphics memory base address, which is programmable on 512
KB boundaries. This field corresponds to address bits [29:19].
Note that BC_DRAM_TOP must be set to a value lower than the Graphics Base Address.
GX_BASE+8418h-841Bh
MC_DR_ADD (R/W)
Reset Value: 00000000h
31:10
RSVD (Reserved). Write as 0.
9:0
DRADD (Dirty RAM Address). This field is the address index that is used to access the Dirty RAM with the MC_DR_ACC
register. This field does not auto increment.
GX_BASE+841Ch-841Fh
MC_DR_ACC (R/W)
Reset Value: 0000000xh
31:2
RSVD (Reserved). Write as 0.
1
D (Dirty Bit). This bit is read/write accessible.
0
V (Valid Bit). This bit is read/write accessible.
Table 1-2. SC2200 Memory Controller Registers (Continued)
Bit
Description



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