SC2200 datasheet(90/433 Pages) NSC

номер детали	SC2200

подробное описание детали	Thin Client On a Chip

PDF	433 Pages

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производитель	NSC [National Semiconductor (TI)]

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Revision 3.0

General Configuration Block (Continued)

Offset 04h

WATCHDOG Status Register - WDSTS (R/WC)

Reset Value: 00h

This register contains WATCHDOG status information.

7:4

Reserved. Write as read.

WDRST (WATCHDOG Reset Asserted) (Read Only) This bit is set to 1 when WATCHDOG Reset is asserted. It is set to 0

when POR# is asserted, or when the WDOVF bit is set to 0.

WDSMI (WATCHDOG SMI Asserted.) (Read Only) This bit is set to 1 when WATCHDOG SMI is asserted. It is set to 0

when POR# is asserted, or when the WDOVF bit is set to 0.

WDINT (WATCHDOG Interrupt Asserted, Read Only). This bit is set to 1 when the WATCHDOG Interrupt is asserted. It is

set to 0 when POR# is asserted, or when the WDOVF bit is set to 0.

WDOVF (WATCHDOG Overflow). This bit is set to 1 when the WATCHDOG Timer reaches 0. It is set to 0 when POR# is

asserted, or when a 1 is written to this bit by software. Other system reset sources do not affect this bit.

Offset 05h-07h

Reserved - RSVD

Table 3-3. WATCHDOG Registers (Continued)

Bit

Description

SC2200 датащи(PDF) 90 Page - National Semiconductor (TI)