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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SC2200 датащи(PDF) 58 Page - National Semiconductor (TI) |
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SC2200 датащи(HTML) 58 Page - National Semiconductor (TI) |
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58 / 433 page  www.national.com 58 Revision 3.0 Signal Definitions (Continued) CS1# AK29 AH27 O Chip Selects. These bits are used to select the module bank within system memory. Each chip select corresponds to a specific module bank. If CS# is high, the bank(s) do not respond to RAS#, CAS#, and WE# until the bank is selected again. --- CS0# P29 AL12 --- RASA# N31 AK12 O Row Address Strobe. RAS#, CAS#, WE# and CKE are encoded to support the different SDRAM commands. RASA# is used with CS[1:0]#. --- CASA# N30 AJ12 O Column Address Strobe. RAS#, CAS#, WE# and CKE are encoded to support the different SDRAM commands. CASA# is used with CS[1:0]#. --- WEA# N29 AH12 O Write Enable. RAS#, CAS#, WE# and CKE are encoded to support the different SDRAM commands. WEA# is used with CS[1:0]#. --- DQM7 AJ20 AB31 O Data Mask Control Bits. During memory read cycles, these outputs control whether SDRAM output buffers are driven on the MD bus or not. All DQM signals are asserted dur- ingreadcycles. During memory write cycles, these outputs control whether or not MD data is written into SDRAM. DQM[7:0] connect directly to the [DQM7:0] pins of each DIMM connector. --- DQM6 AJ26 AG29 --- DQM5 AC30 AK21 --- DQM4 T28 AL15 --- DQM3 AJ21 AC31 --- DQM2 AL26 AG30 --- DQM1 AF31 AH23 --- DQM0 M31 AL11 --- CKEA AC28 AL22 O Clock Enable. These signals are used to enter Suspend/power-down mode. CKEA is used with CS[1:0]#. If CKE goes low when no read or write cycle is in progress, the SDRAM enters power- down mode. To ensure that SDRAM data remains valid, the self-refresh command is executed. To exit this mode, and return to normal operation, drive CKE high. These signals should have an external pull- down resistor of 33 K Ω. --- SDCLK3 AJ16 V29 O SDRAM Clocks. SDRAM uses these clocks to sample all control, address, and data lines. To ensure that the Suspend mode functions correctly, SDCLK3 and SDCLK1 should be used with CS1#. SDCLK2 and SDCLK0 shouldbeusedtogetherwithCS0#. --- SDCLK2 AL20 AA28 --- SDCLK1 AH16 W29 --- SDCLK0 AC29 AJ21 --- SDCLK_IN AJ30 AJ27 I SDRAM Clock Input. The SC2200 samples the memory read data on this clock. Works in conjunction with the SDCLK_OUT signal. --- 2.4.2 Memory Interface Signals (Continued) Signal Name Ball No. Type Description Mux EBGA TEPBGA |
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