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SC2200 датащи(PDF) 41 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
номер детали SC2200
подробное описание детали  Thin Client On a Chip
PDF  433 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

SC2200 датащи(HTML) 41 Page - National Semiconductor (TI)

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Revision 3.0
41
www.national.com
Signal Definitions (Continued)
G28
VSS
GND
---
---
---
G29
VIO
PWR
---
---
---
G30
VSS
GND
---
---
---
G31
VPD7
I
INT
VIO
---
H1
SERR#
I/O
(PU22.5)
INPCI,
ODPCI
VIO
---
H2
PERR#
I/O
(PU22.5)
INPCI,
OPCI
VIO
---
H3
LOCK#
I/O
(PU22.5)
INPCI,
OPCI
VIO
---
H4
C/BE3#
I/O
(PU22.5)
INPCI,
OPCI
VIO
Cycle Multiplexed
D11
I/O
(PU22.5)
INPCI,
OPCI
H28
VPD6
I
INT
VIO
---
H29
VPD5
I
INT
VIO
---
H30
VPD4
I
INT
VIO
---
H31
VPD3
I
INT
VIO
---
J1
AD13
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A13
O
OPCI
J2
C/BE1#
I/O
(PU22.5)
INPCI,
OPCI
VIO
Cycle Multiplexed
D9
I/O
(PU22.5)
INPCI,
OPCI
J3
AD15
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A15
O
OPCI
J4
PAR
I/O
(PU22.5)
INPCI,
OPCI
VIO
Cycle Multiplexed
D12
I/O
(PU22.5)
INPCI,
OPCI
J28
VPD2
I
INT
VIO
---
J29
VPD1
I
INT
VIO
---
J30
VPD0
I
INT
VIO
---
J31
GPIO39
I/O
(PU22.5)
INPCI,
OPCI
VIO
PMR[14]4 = 0 and
PMR[22]4 =0
SERIRQ
I/O
INPCI,
OPCI
PMR[14]4 = 1 and
PMR[22]4 =1
K1
AD11
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A11
O
OPCI
K2
VIO
PWR
---
---
---
K3
VSS
GND
---
---
---
K4
AD14
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A14
O
OPCI
Ball
No.
Signal Name
I/O
(PU/PD)
Buffer1
Type
Power
Rail
Configuration
K28
GPIO38/IRRX2
I/O
(PU22.5)
INPCI,
OPCI
VIO
PMR[14]4 = 0 and
PMR[22]4 =0.The
IRRX2 input is con-
nected to the input
path of GPIO38.
Thereis nologic
required to enable
IRRX2, just a sim-
ple connection.
Hence, when
GPIO38 is the
selected function,
IRRX2 is also
selected.
LPCPD#
O
OPCI
PMR[14]4 = 1 and
PMR[22]4 =1
K29
VIO
PWR
---
---
---
K30
VSS
GND
---
---
---
K31
GPIO37
I/O
(PU22.5)
INPCI,
OPCI
VIO
PMR[14]4 = 0 and
PMR[22]4 =0
LFRAME#
O
OPCI
PMR[14]4 = 1 and
PMR[22]4 =1
L1
C/BE0#
I/O
(PU22.5)
INPCI,
OPCI
VIO
Cycle Multiplexed
D8
I/O
(PU22.5)
INPCI,
OPCI
L2
AD9
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A9
O
OPCI
L3
AD10
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A10
O
OPCI
L4
AD12
I/O
INPCI,
OPCI
VIO
Cycle Multiplexed
A12
O
OPCI
L28
GPIO36
I/O
(PU22.5)
INPCI,
OPCI
VIO
PMR[14]4 = 0 and
PMR[22]4 =0
LDRQ#
I
INPCI
PMR[14]4 = 1 and
PMR[22]4 =1
L29
GPIO35
I/O
(PU22.5)
INPCI,
OPCI
VIO
PMR[14]4 = 0 and
PMR[22]4 =0
LAD3
I/O
(PU22.5)
INPCI,
OPCI
PMR[14]4 = 1 and
PMR[22]4 =1
L30
GPIO34
I/O
(PU22.5)
INPCI,
OPCI
VIO
PMR[14]4 = 0 and
PMR[22]4 =0
LAD2
I/O
(PU22.5)
INPCI,
OPCI
PMR[14]4 = 1 and
PMR[22]4 =1
L31
GPIO33
I/O
(PU22.5)
INPCI,
OPCI
VIO
PMR[14]4 = 0 and
PMR[22]4 =0
LAD1
I/O
(PU22.5)
INPCI,
OPCI
PMR[14]4 = 1 and
PMR[22]4 =1
M1
VSS
GND
---
---
---
Ball
No.
Signal Name
I/O
(PU/PD)
Buffer1
Type
Power
Rail
Configuration
Table 2-4.
481-TEPBGA Ball Assignment - Sorted by Ball Number (Continued)



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