82375EB datasheet(104/131 Pages) INTEL

104 / 131 page

82375EBSB

The ESC negates CMD

after one BCLK period unless the slave adds wait states (negates EXRDY) The ESC

latches SD 150 into the PCEB’s data swap buffer on the trailing edge of CMD

The ESC controls the PCEB

data swap buffers via the PCEBESC Interface The ESC then asserts START

and presents BE 30 (upper

word enabled) The ESC negates START

and asserts CMD

The slave latches the address on the trailing

edge of START

and presents data on SD 150 The ESC negates CMD

after one BCLK unless the slave

negates EXRDY The ESC latches SD 150 into the PCEB data swap buffers on the trailing edge of CMD

and instructs the PCEB data swap buffer to copy D 150 to D 310 and asserts EX32

Note that since the

transfer is intended for the PCEB the data is not re-driven back out onto the EISA Bus The ESC floats the

START

and BE 30

The PCEB regains control of the EISA Bus after sampling EX32

and EX16

asserted

PCEB Writing To a 16-bit EISA Slave

As a 32-bit EISA master the PCEB begins by placing the address on LA 312 and driving MIO

The 16-bit

EISA slave decodes the address and asserts EX16

The PCEB asserts START

BE 30

and

SD 310

The ESC samples EX32

and EX16

on the rising edge of BCLK following the assertion of

START

and asserts CMD

At the same time the PCEB negates START

and samples EX32

When

EX32

is sampled negated the PCEB floats START

SD 310

and BE 30

The data is latched in the

PCEB’s data swap buffers Note that the PCEB continues to drive a valid address on LA 312

The ESC instructs the PCEB to drive the data out on SD 310 and asserts CMD

after sampling EX32

negated The slave may sample SD 150 while CMD

is asserted The ESC negates CMD

after one BCLK

unless the slave adds wait states (negates EXRDY) The ESC then presents BE 30 (upper word enabled)

and asserts START

The ESC instructs the PCEB to copy SD 310 to SD 150

negates START

and

asserts CMD

The ESC negates CMD

after one BCLK unless the slave negates EXRDY The slave

latches the address on the trailing edge of START

and samples SD 150 on the trailing edge of CMD

The

ESC returns control of the EISA Bus to the PCEB by floating BE 30

and START

then asserting EX32

The PCEB samples EX32

and EX16

asserted on the rising edge of BCLK

104

82375EB датащи(PDF) 104 Page - Intel Corporation

82375EB датащи(HTML) 104 Page - Intel Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL