82375EB datasheet(33/131 Pages) INTEL

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82375EBSB

Bit

Description

Subtractive Decoding Sample Point (SDSP)

The SDSP field determines the DEVSEL

sample

point after which an inactive DEVSEL

results in the PCEB forwarding the unclaimed PCI cycle to the

EISA Bus (subtractive decoding) This setting should match the slowest device in the system When

the MEMCS

function is enabled MEMCS

is sampled as well as an early indication of an eventual

DEVSEL

Bits 43

Operation

Slow sample point (default value)

Typical sample point

Reserved

This bit must be 0 when programming this register

Reserved

318 ARBCONPCI ARBITER CONTROL REGISTER

Address Offset

41h

Default Value

80h

Attribute

ReadWrite

Size

8 bits

This register controls the operation of the PCEB’s internal PCI arbiter The register enablesdisables auto-

PEREQ

controls the master retry timer enablesdisables CPU bus parking controls bus lock and enables

disables the guaranteed access time (GAT) mode for EISAISA accesses

NOTE

1 For proper system operation the master retry timer (bits 43 ) must not be disabled This field

defaults to 00 (disabled) and must be program to either 01 10 or 11

2 The PCMC Host bridge device requires that bit 7 be set to 1 (default) However other chip sets

might need to have this function disabled to provide more optimum performance for EISA subsys-

tems This functionality is built-in to prevent starvation of PCI agents (in particular the host bridge

CPU) when EISA masters are performing transactions in the GAT mode If this function is dis-

abled the host bridge must be capable of generating the PCI Bus request even when the Host Bus is

not controlled by the CPU (CPU tri-stated all Host Bus signals or even only address bus in response

to HOLDAHOLD) The CPU pin that provides an indication of a request for the external bus (eg

after cache miss) can be used by the host bridge to generate the request for the PCI Bus during GAT

mode operations even when no address lines are driven by the CPU

82375EB датащи(PDF) 33 Page - Intel Corporation

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