82375EB datasheet(55/131 Pages) INTEL

55 / 131 page

82375EBSB

290477 – 47

NOTE

Fast DEVSEL

is not supported on the 82378EB or 82375SB

Figure 5 DEVSEL

Sample Points

Only unclaimed PCI cycles within the memory address range from 0 to 4 GByte and IO address range from 0

to 64 KByte are forwarded to EISA Unclaimed PCI IO cycles to address locations above 64 KBytes are not

forwarded to the EISA Bus and the PCEB does not respond with DEVSEL

In this case these unclaimed

cycles cause the master to terminate the PCI cycle with a master abort

For the 82374SB if negative decoding is used the PCEB begins the PCI-to-EISA cycle forwarding process at

the ‘‘fast’’ sample point Compared to the system that uses subtractive decode at the ‘‘slow’’ sample point

negative decoding reduces the decoding overhead by 2 PCI clock cycles In the case of subtractive decode at

the ‘‘typical’’ sampling point negative decoding reduces the overhead by 1 PCI clock

The PCEB contains programmable configuration registers that define address ranges for PCI resident devices

There is a set of registers associated with MEMCS

decoding of main memory areas and set of registers for

defining address mapping of up to four memory regions that are mapped to PCI for EISA Bus initiated cycles

Note that on the 82375EB there is no equivalent mechanism for mapping the PCI memory regions to EISA

and therefore all PCI memory cycles that need to be forwarded to the EISA Bus use subtractive decoding

For the 82374SB when negative decoding is selected memory cycles with addresses other than those

specified by the MEMCS

mapping for positive decode (via the MCSCON MCSBOH MCSTOH MCSTOM

MAR1 MAR2 and MAR3 Registers) or the four programmable EISA-to-PCI memory regions (via MEM-

REGN 41 ) are immediately forwarded to the EISA Bus without waiting for a DEVSEL

time-out

82375EB датащи(PDF) 55 Page - Intel Corporation