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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SC28L201 датащи(PDF) 101 Page - NXP Semiconductors |
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SC28L201 датащи(HTML) 101 Page - NXP Semiconductors |
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101 / 110 page  9397 750 13138 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 — 31 October 2005 101 of 110 Philips Semiconductors SC28L201 3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO C1 = C2 ∼ 24 pF for C L = 13.5 pF. For the oscillator feedback loop, the capacitors C1 and C2 are in series. C1 and C2 should be chosen according to the crystal manufacturer’s specification. C1 and C2 values will include any parasitic capacitance of the wiring and X1, X2 pins. Package capacitance approximately 4 pF. Fig 14. Clock timing CLK X2 14.7456 MHz X1 C1 C2 SC28L201 2 pF 4 pF X1/SCLK C/T clock RxC TxC tCLK tCTC tRX tTX tCLK tCTC tRX tTX X1/SCLK X2 (must be left open) VCC 470 Ω resistor required for TTL input 002aab481 to UART circuit 160 k Ω (typ.) 3 pF parasitic capacitance 3 pF parasitic capacitance Fig 15. Transmitter external clocks Fig 16. Receiver external clock 002aab482 1 bit time (1 or 16 clocks) TxC (input) TXD td(o)(TXD) TxC (1 × output) tTCS 002aab483 RXD RxC (1 × output) tsu(RXD-RXCH)(D) th(RXCH-RXD)(D) |
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