SC28L201 datasheet(87/110 Pages) NXP

87 / 110 page

9397 750 13138

Product data sheet

Rev. 01 — 31 October 2005

87 of 110

Philips Semiconductors

SC28L201

3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO

Table 78:

The register map for channel A (UART A).

A[6:0]

Read

Write

010 0000 (0x20)

Mode Register 0 (MR0 A)

010 0001 (0x21)

Mode Register 1 (MR1 A)

010 0010 (0x22)

Mode Register 2 (MR2 A)

010 0011 (0x23)

Mode Register 3 (MR3 A)

010 0100 (0x24)

Counter/Timer Clock Source (CTCS 0)

010 0101 (0x25)

Interrupt Status Register (ISR A)

Interrupt Mask Register (IMR A)

010 0110 (0x26)

Programmable BRG Preset Lower (PBRGPL 0)

010 0111 (0x27)

Programmable BRG Preset Upper (PBRGPU 0)

…

010 1000 (0x28)

010 1001 (0x29)

010 1010 (0x2A)

010 1011 (0x2B)

010 1100 (0x2C)

Counter/Timer Clock Source (CTCS 1)

010 1101 (0x2D)

010 1110 (0x2E)

010 1111 (0x2F)

…

011 0000 (0x30)

Receiver Clock Select Register (RxCSR A)

011 0001 (0x31)

Transmitter Clock Select Register (TxCSR A)

011 0010 (0x32)

Input Port Change Interrupt Enable (IPCE A)

011 0011 (0x33)

Programmable BRG Clock Source (PBRGCS)

011 0100 (0x34)

011 0101 (0x35)

011 0110 (0x36)

Programmable BRG Preset Lower (PBRGPL 1)

011 0111 (0x37)

Programmable BRG Preset Upper (PBRGPU 1)

…

011 1000 (0x38)

011 1001 (0x39)

011 1010 (0x3A)

Input Port Change Interrupt Enable (IPCE B)

011 1011 (0x3B)

011 1100 (0x3C)

011 1101 (0x3D)

011 1110 (0x3E)

011 1111 (0x3F)

…

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