SC28L201 datasheet(41/110 Pages) NXP

41 / 110 page

9397 750 13138

Product data sheet

Rev. 01 — 31 October 2005

41 of 110

Philips Semiconductors

SC28L201

3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO

8.1.6 Enhanced Operation Status register (EOS)

This register reports the status of the Enhanced operation in several sub-systems in the

UART.

8.2 UART registers

Remark: These registers are generally concerned with formatting, transmitting and

receiving data.

The user must exercise caution when changing the mode of running receivers,

transmitters, PBRG or counter/timers. The selected mode will be activated immediately

upon selection, even if this occurs during the reception or transmission of a character. It is

also possible to disrupt internal controllers by changing modes at critical times, thus

rendering later transmission or reception faulty or impossible.

An exception to this policy is switching from auto-echo or remote loopback modes to

normal mode. If the deselecting occurs just after the receiver has sampled the stop bit (in

most cases indicated by the assertion of the channels RxRDY bit) and the transmitter is

enabled, the transmitter will remain in auto-echo mode until the end of the transmission of

the stop bit.

Table 11:

EOS - Enhanced Operation Status register (address 0x12) bit description

Bit

Symbol

Description

reserved

I/O port operation

0 = default

1 = enhanced

reserved

Counter/Timer 0 clock select

0 = default

1 = enhanced

not used; returns ‘0’ on read

Rx/Tx clock selection

0 = default

1 = enhanced

not used; returns ‘0’ on read

FIFO interrupt level control

0 = default

1 = enhanced

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