SC28L201 datasheet(91/110 Pages) NXP

91 / 110 page

9397 750 13138

Product data sheet

Rev. 01 — 31 October 2005

91 of 110

Philips Semiconductors

SC28L201

3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO

11. Static characteristics

[1]

Typical values are at +25

°C, typical supply voltages, and typical processing parameters.

[2]

All voltage measurements are referenced to ground. For testing, all inputs swing between 0.4 V and 3.0 V with a transition time of 5 ns

maximum. For X1/SCLK this swing is between 0.4 V and 4.4 V. All time measurements are referenced at input voltages of 0.8 V and

2.0 V, and output voltages of 0.8 V and 2.0 V, as appropriate.

[3]

Test conditions for outputs: CL = 85 pF, except interrupt outputs. Test conditions for interrupt outputs: CL =85pF, RL = 2.7 kΩ to VDD.

[4]

I/O port and IACKN pins have active pull-up transistors that will source a typical 2

µA from V

DD when they are at VSS.AtVDD they source

0.0

µA.

[5]

All outputs are disconnected. Inputs are switching between CMOS levels of VDD − 0.2 V and VSS + 0.2 V.

Table 80:

Static characteristics, nominal 5 V operation

VDD =5V ± 10 %; Tamb = −40 °Cto+85 °C; unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ [1]

Max

Unit

VIL

LOW-state input voltage

[2] -

0.8

VIH

HIGH-state input voltage

except pin X1/SCLK

[2] 2.4

pin X1/SCLK

[2] 0.8VDD

VOL

LOW-state output voltage

IOL =4mA

[2] -

0.4

VOH

HIGH-state output voltage

except open-drain outputs;

IOH = −400 µA

[2] [3] VDD − 0.5 -

II(PD)(X1/SCLK)

Power-down mode input current

on pin X1/SCLK

VI = 0 V to VDD

−1-

µA

IIL(X1/SCLK)

LOW-state input current on pin

X1/SCLK

operating mode; VI =0V

−30

µA

IIH(X1/SCLK)

HIGH-state input current on pin

X1/SCLK

operating mode; VI =VDD

µA

ILI

input leakage current

VI = 0 V to VDD

input port and IACKN pins

[4]

−10

µA

all other pins

[4]

−1-

µA

IOZH

HIGH off-state output current

3-state data bus; VI =VDD

µA

IOZL

LOW off-state output current

3-state data bus; VI =0V

−5-

µA

IODL

LOW off-state open-drain output

current

VI =0V

−10

µA

IODH

HIGH off-state open-drain

output current

VI =VDD

µA

IDD

supply current

CMOS input levels

[5]

operating mode; f = 10 MHz

Power-down mode; f = 0 MHz

200

500

µA

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