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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SC28L201 датащи(PDF) 75 Page - NXP Semiconductors |
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SC28L201 датащи(HTML) 75 Page - NXP Semiconductors |
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75 / 110 page  9397 750 13138 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 — 31 October 2005 75 of 110 Philips Semiconductors SC28L201 3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO 8.6.2 Input Port Change Register Lower Nibble, B (IPCRL) This register may be read to determine the current logical level of the I/O pins and examine the output of the change detectors assigned to each pin. If the change detection is not enabled or if the pin is configured as an output, the associated change field will read ‘0’. Table 62: IPCRL - Input Port Change Register Lower Nibble, B (address 0x1C) bit description Bit Symbol Description 7 ∆I/O3B change. 0 = no change 1 = change 6 ∆I/O2B change. 0 = no change 1 = change 5 reserved 4 ∆I/O0B change. 0 = no change 1 = change 3 I/O3B state. Reads the actual logic level at the pin. 1 = HIGH level 0 = LOW level 2 I/O2B state. Reads the actual logic level at the pin. 1 = HIGH level 0 = LOW level 1 reserved 0 I/O0B state. Reads the actual logic level at the pin. 1 = HIGH level 0 = LOW level |
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