LFSC datasheet(32/237 Pages) LATTICE

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2-28

Architecture

Lattice Semiconductor

LatticeSC/M Family Data Sheet

Table 2-10. Supported Output Standards

Output Standard

Drive

VCCIO (Nom)

On-chip Output Termination

Single-ended Interfaces

LVTTL/D

8mA, 16mA, 24mA

3.3

None.

LVCMOS33/D

8mA, 16mA, 24mA

3.3

None

LVCMOS25/D

1, 2

4mA, 8mA, 12mA, 16mA,

2.5

None, series: 25, 33, 50, 100

LVCMOS18/D

1, 2

4mA, 8mA, 12mA, 16mA,

1.8

None, series: 25, 33, 50, 100

LVCMOS15/D

1, 2

4mA, 8mA, 12mA, 16mA,

1.5

None, series: 25, 33, 50, 100

LVCMOS12/D

1, 2

2mA, 4mA, 8mA, 12mA

1.2

None, series: 25, 33, 50, 100

PCIX15

N/A

1.5

None

PCI33, PCIX33, AGP1X33,

AGP2X33

N/A

3.3

None

HSTL18_I

N/A

1.8

None, series: 50

HSTL18_II

N/A

1.8

None, series: 25, series + parallel to VCCIO/2:

25 + 60

HSTL15_I

N/A

1.5

None, series: 50

HSTL15_II

N/A

1.5

None, series: 25, series + parallel to VCCIO/2:

25 + 60

SSTL33_I

N/A

3.3

None

SSTL33_II

N/A

3.3

None

SSTL25_I

N/A

2.5

None, series: 50

SSTL25_II

N/A

2.5

None, series: 33, series + parallel to VCCIO/2:

33+ 60

SSTL18_ I

N/A

1.8

None, series: 33

SSTL18_II

N/A

1.8

None, series: 33, series + parallel to VCCIO/2:

33+ 60

Differential Interfaces

SSTL18D_I

N/A

1.8

None, series: 33

SSTL25D_I

N/A

2.5

None, series: 50

SSTL18D_II, SSTL25D_II

N/A

1.2/2.5/3.3

None, series: 33, series + parallel to VCCIO/2:

33+ 60

SSTL33D_I, II

N/A

3.3

None

HSTL15D_I, HSTL18D_I

N/A

1.5/1.8

None, series: 50

HST15D_II, HSTL18D_II

N/A

1.5/1.8

None, series: 25, series + parallel to VCCIO/2:

25 + 60

LVDS

2mA, 3.5mA, 4mA, 6mA

N/A

None

Mini-LVDS

3.5mA, 4mA, 6mA

N/A

None

BLVDS25

N/A

None

MLVDS25

N/A

None

LVPECL33

N/A

3.3

None

HYPT (Hyper Transport)

3.5mA, 4mA, 6mA

N/A

None

RSDS

2mA, 3.5mA, 4mA, 6mA

N/A

None

1. D refers to open drain capability.

2. User can select either drive current or driver impedances but not both.

3. Emulated with external resistors.

4. No GTL or GTL+ support.

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