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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LFSC датащи(PDF) 55 Page - Lattice Semiconductor |
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LFSC датащи(HTML) 55 Page - Lattice Semiconductor |
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55 / 237 page  3-11 DC and Switching Characteristics Lattice Semiconductor LatticeSC/M Family Data Sheet Typical Building Block Function Performance Over Recommended Commercial Operating Conditions at VCC = 1.2V +/- 5% Pin to Pin Performance (LVCMOS25 12 mA Drive) Register-to-Register Performance Function -7* Units Basic Functions 32-bit Decoder 6.65 ns Combinatorial (Pin to LUT to Pin) 5.58 ns Embedded Memory Functions (Single Port RAM) Pin to EBR Input Register Setup (Global Clock) 1.66 ns EBR Output Clock to Pin (Global Clock) 8.54 ns Distributed (PFU) RAM (Single Port RAM) Pin to PFU RAM Register Setup (Global Clock) 1.32 ns PFU RAM Clock to Pin (Global Clock) 6.83 ns *Typical performance per function Function -7* Units Basic Functions 32-Bit Decoder 539 MHz 64-Bit Decoder 517 MHz 16:1 MUX 1003 MHz 32:1 MUX 798 MHz 16-Bit Adder 672 MHz 64-Bit Adder 353 MHz 16-Bit Counter 719 MHz 64-Bit Counter 369 MHz 32x8 SP RAM (PFU, Output Registered) 768 MHz 128x8 SP RAM (PFU, Output Registered) 545 MHz Embedded Memory Functions Single Port RAM (512x36 Bits) 372 MHz True Dual Port RAM 1024x18 Bits (No EBR Out Reg) 326 MHz True dual port RAM 1024x18 Bits (EBR Reg) 372 MHz FIFO port (A: x36 bits, B: x9 Bits, No EBR Out Reg) 353 MHz FIFO port (A: x36 bits, B: x9 Bits, EBR Reg) 375 MHz True DP RAM Width Cascading (1024x72) 372 MHz DSP Functions 9x9 1-stage Multiplier 209 MHz 18x18 1-Stage Multiplier 155 MHz 9x9 3-Stage Pipelined Multiplier 373 MHz 18x18 4-Stage Pipelined Multiplier 314 MHz 9x9 Constant Multiplier 372 MHz *Typical performance per function |
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