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PSD835G2 датащи(PDF) 44 Page - STMicroelectronics

номер детали PSD835G2
подробное описание детали  Flash PSD, 5V Supply, for 8-bit MCUs 4 Mbit 256 Kbit Dual Flash Memories and 64 Kbit SRAM
PDF  102 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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PSD835G2 датащи(HTML) 44 Page - STMicroelectronics

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Product Term Allocator
The CPLD has a Product Term Allocator. The PSD
uses the Product Term Allocator to borrow and
place product terms from one macrocell to anoth-
er. The following list summarizes how product
terms are allocated:
McellA0-McellA7 all have three native product
terms and may borrow up to six more
McellB0-McellB3 all have four native product
terms and may borrow up to five more
McellB4-McellB7 all have four native product
terms and may borrow up to six more.
Each macrocell may only borrow product terms
from certain other macrocells. Product terms al-
ready in use by one macrocell are not available for
another macrocell.
If an equation requires more product terms than
are available to it, then “external” product terms
are required that consume other Output Macro-
cells (OMC). If external product terms are used,
extra delay is added for the equation that required
the extra product terms.
This is called product term expansion. PSDsoft
performs this expansion as needed.
Loading and Reading the Output Macrocells
(OMC)
The Output Macrocells (OMC) block occupies a
memory location in the MCU address space, as
defined
by
the
CSIOP
block
(see
I/O
PORTS, page 59). The flip-flops in each of the 16
Output Macrocells (OMC) can be loaded from the
data bus by a MCU. Loading the Output Macro-
cells (OMC) with data from the MCU takes priority
over internal functions. As such, the preset, clear,
and clock inputs to the flip-flop can be overridden
by the MCU. The ability to load the flip-flops and
read them back is useful in such applications as
loadable counters and shift registers, mailboxes,
and handshaking protocols.
Data can be loaded to the Output Macrocells
(OMC) on the trailing edge of the Write Strobe
(WR, CNTL0) signal.
The OMC Mask Register
There is one Mask Register for each of the two
groups of eight Output Macrocells (OMC). The
Mask Registers can be used to block the loading
of data to individual Output Macrocells (OMC).
The default value for the Mask Registers is 00h,
which allows loading of the Output Macrocells
(OMC). When a given bit in a Mask Register is set
to a '1,' the MCU is blocked from writing to the as-
sociated Output Macrocells (OMC). For example,
suppose McellA0-McellA3 are being used for a
state machine. You would not want a MCU WRITE
to McellA to overwrite the state machine registers.
Therefore, you would want to load the Mask Reg-
ister for McellA (Mask Macrocell AB) with the value
0Fh.
The Output Enable of the OMC
The Output Macrocells (OMC) block can be con-
nected to an I/O port pin as a PLD output. The out-
put enable of each port pin driver is controlled by
a single product term from the AND Array, ORed
with the Direction Register output. The pin is en-
abled upon Power-up if no output enable equation
is defined and if the pin is declared as a PLD out-
put in PSDsoft.
If the Output Macrocell (OMC) output is declared
as an internal node and not as a port pin output in
the PSDabel file, the port pin can be used for other
I/O functions. The internal node feedback can be
routed as an input to the AND Array.



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