PSD835G2 datasheet(25/102 Pages) STMICROELECTRONICS

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PSD835G2

Primary Flash Memory and Secondary Flash

memory Description

The primary Flash memory is divided evenly into

eight equal sectors. The secondary Flash memory

is divided into four equal sectors of eight KBytes

each. Each sector of either memory block can be

separately protected from Program and Erase cy-

cles.

Flash memory may be erased on a sector-by-sec-

tor basis and programmed Word-by-Word. Flash

sector erasure may be suspended while data is

read from other sectors of the block and then re-

sumed after reading.

During a Program or Erase cycle in Flash memory,

the status can be output on Ready/Busy (PE4).

This pin is set up using PSDsoft.

Memory Block Select Signals

The DPLD generates the Select signals for all the

internal memory blocks (see PLDs, page 38).

Each of the eight sectors of the primary Flash

memory has a Select signal (FS0-FS7) which can

contain up to three product terms. Each of the four

sectors of the secondary Flash memory has a Se-

lect signal (CSBOOT0-CSBOOT3) which can con-

tain up to three product terms. Having three

product terms for each Select signal allows a given

sector to be mapped in different areas of system

memory. When using an MCU with separate Pro-

gram and Data space, these flexible Select signals

allow dynamic re-mapping of sectors from one

memory space to the other before and after IAP.

Upper and Lower Block IN MAIN FLASH

SECTOR

The PSD835G2’s main Flash memory has eight

64-KByte sectors. The 64-KByte sector size may

cause some difficulty in code mapping for an 8-bit

MCU with only 64-KByte address space. To re-

solve this mapping issue, the PSD835G2 provides

additional logic (see Figure 6., page 26) for the

user to split the 8 sectors such that each sector

has a lower and upper 32-KByte block, and the

two blocks can reside in different pages but in the

same address range.

If your design works with 64KB sectors, you don’t

need to configure this logic. If the design requires

32KB blocks in each sector, you need to define a

“FA15” PLD equation in PSDsoft as the A15 ad-

dress input to the main Flash module. FA15 con-

sists of 3 product terms and will control whether

the MCU is accessing the lower or upper 32KB in

the selected sector. Figure 4 shows an example

for Flash sector chip select FS0. A typical equation

is FA15 = pgr4 of the Page Register. When pgr4 is

0 (page 00), the lower 32KB is selected. When

pgr4 is switched to ’1’ by the user, the upper 32KB

is selected. PSDsoft will automatically generate

the PLD equations shown, based on your point

and click selections.

If no FA15 equation is defined in PSDsoft, the A15

that comes from the MCU address bus will be rout-

ed as input to the primary Flash memory instead of

FA15. The FA15 equation has no impact on the

Sector Erase operation.

Note: FA15 affects all eight sectors of the primary

Flash memory simultaneously. You cannot direct

FA15 to a particular Flash sector only.

Figure 5. Example for Flash Sector Chip Select FS0

page = [pgr7... pgr0]; “Page Register output

“Sector Chip Select Equation

FS0 = ((0000h <= address <= 7FFFh) & page = 00h) #

“select first 32KB block

((0000h <= address <= 7FFFh) & page = 10h);

“select second 32KB block

FA15 = pgr4;

“as address A15 input to the primary Flash memory

ai07652

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