PSD835G2 datasheet(31/102 Pages) STMICROELECTRONICS

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PSD835G2

PROGRAMMING FLASH MEMORY

Flash memory must be erased prior to being pro-

grammed. The MCU may erase Flash memory all

at once or by-sector. A Flash memory sector is

erased to all 1s (FFh), and is programmed by set-

ting selected bits to '0.' Although Flash memory is

erased by-sector, it is programmed Word-by-

Word.

The primary and secondary Flash memories re-

quire the MCU to send an instruction to program a

Word or to erase sectors (see Table 28., page 27).

Once the MCU issues a Flash memory Program or

Erase instruction, it must check the status bits for

completion. The embedded algorithms that are in-

voked inside the PSD support several means to

provide status to the MCU. Status may be checked

using any of three methods: Data Polling, Data

Toggle, or the Ready/Busy (PE4) output pin.

Data Polling

Polling on the Data Polling Flag Bit (DQ7) is a

method of checking whether a Program or Erase

cycle is in progress or has completed. Figure 7

shows the Data Polling algorithm.

When the MCU issues a Program instruction, the

embedded algorithm within the PSD begins. The

MCU then reads the location of the Word to be

programmed in Flash memory to check status.

The Data Polling Flag Bit (DQ7) of this location be-

comes the complement of b7 of the original data

byte to be programmed. The MCU continues to

poll this location, comparing the Data Polling Flag

Bit (DQ7) and monitoring the Error Flag Bit (DQ5).

When the Data Polling Flag Bit (DQ7) matches b7

of the original data, and the Error Flag Bit (DQ5)

remains '0,' the embedded algorithm is complete.

If the Error Flag Bit (DQ5) is '1,' the MCU should

test the Data Polling Flag Bit (DQ7) again since

the Data Polling Flag Bit (DQ7) may have changed

simultaneously with the Error Flag Bit (DQ5, see

Figure 7).

The Error Flag Bit (DQ5) is set if either an internal

time-out occurred while the embedded algorithm

attempted to program the Byte or if the MCU at-

tempted to program a ’1’ to a bit that was not

erased (not erased is logic 0).

It is suggested (as with all Flash memories) to read

the location again after the embedded program-

ming algorithm has completed, to compare the

Byte that was written to the Flash memory with the

Byte that was intended to be written.

When using the Data Polling method after an

Erase cycle, Figure 7 still applies. However, the

Data Polling Flag Bit (DQ7) is '0' until the Erase cy-

cle is complete. A '1' on the Error Flag Bit (DQ5) in-

dicates a time-out condition on the Erase cycle; a

'0' indicates no error. The MCU can read any loca-

tion within the sector being erased to get the Data

Polling Flag Bit (DQ7) and the Error Flag Bit

(DQ5).

PSDsoft generates ANSI C code functions which

implement these Data Polling algorithms.

Figure 7. Data Polling Flowchart

READ DQ5 & DQ7

at VALID ADDRESS

START

READ DQ7

FAIL

PASS

AI01369B

DQ7

DATA

YES

DQ5

= 1

DQ7

DATA

YES

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