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PSD835G2 датащи(PDF) 53 Page - STMicroelectronics

номер детали PSD835G2
подробное описание детали  Flash PSD, 5V Supply, for 8-bit MCUs 4 Mbit 256 Kbit Dual Flash Memories and 64 Kbit SRAM
PDF  102 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

PSD835G2 датащи(HTML) 53 Page - STMicroelectronics

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PSD835G2
80C31
Figure 22 shows the bus interface for the 80C31,
which has an 8-bit multiplexed address/data bus.
The lower address byte is multiplexed with the
data bus. The MCU control signals Program Se-
lect Enable (PSEN, CNTL2), Read Strobe (RD,
CNTL1), and Write Strobe (WR, CNTL0) may be
used for accessing the internal memory and I/O
Ports blocks. Address Strobe (ALE/AS, PD0)
latches the address.
Figure 22. Interfacing the PSD with an 80C31
EA/VP
X1
X2
RESET
RESET
INT0
INT1
T0
T1
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
PF0
PF1
PF2
PF3
PF4
PF5
PF6
PF7
PG0
PG1
PG2
PG3
PG4
PG5
PG6
PG7
PA0
PA2
PA1
PA3
PA4
PA5
PA6
PA7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
ADIO0
ADIO1
ADIO2
ADIO3
ADIO4
ADIO5
ADIO6
ADIO7
ADIO8
ADIO9
ADIO10
ADIO11
ADIO12
ADIO13
ADIO14
ADIO15
CNTL0 (WR)
CNTL1(RD)
CNTL2 (PSEN)
PD3
PD1 (CLKIN)
PD2 (CS)
RESET
RD
WR
PSEN
ALE/P
TXD
RXD
RESET
31
32
33
34
35
36
37
38
3
39
31
19
18
9
12
13
14
15
1
2
3
4
5
6
7
8
38
37
36
35
34
33
32
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
4
5
6
7
10
11
12
13
14
15
16
17
18
19
20
59
39
60
40
2
80
1
21
22
23
24
25
26
27
28
PSD
80C31
AD7-AD0
21
22
23
24
25
26
27
28
17
16
29
30
A8
A9
A10
A11
A12
A13
A14
A15
RD
WR
PSEN
ALE
10
11
AD[ 7:0]
RESET
51
52
53
54
55
56
57
58
AI02880D
CRYSTAL
AD[15:8]
79
PD0 (ALE)
PE2 (TDI)
PE0 (TMS)
PE1 (TCK/ST)
73
71
72
PE5 (TERR)
PE3 (TDO)
PE4 (TSTAT/RDY)
76
74
75
PE7 (VBATON)
PE6 (VSTBY)
78
77
VCC
VCC
VCC
VCC
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC0
PC2
PC1
PC3
PC4
PC5
PC6
PC7
61
62
63
64
65
66
67
68
41
42
43
44
45
46
47
48
A15-A8
GND GND GND GND GND
70
50
49
30
8



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