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PSD835G2 датащи(PDF) 36 Page - STMicroelectronics

номер детали PSD835G2
подробное описание детали  Flash PSD, 5V Supply, for 8-bit MCUs 4 Mbit 256 Kbit Dual Flash Memories and 64 Kbit SRAM
PDF  102 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

PSD835G2 датащи(HTML) 36 Page - STMicroelectronics

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PSD835G2
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Configuration Modes for MCUs with Separate
Program and Data Spaces
Separate Space Modes. Program space is sep-
arated from Data space. For example, Program
Select Enable (PSEN, CNTL2) is used to access
the program code from the primary Flash memory,
while Read Strobe (RD, CNTL1) is used to access
data from the secondary Flash memory, SRAM
and I/O Port blocks. This configuration requires
the VM register to be set to 0Ch (see Figure 10).
Combined Space Modes. The
Program
and
Data spaces are combined into one memory
space that allows the primary Flash memory, sec-
ondary Flash memory, and SRAM to be accessed
by either Program Select Enable (PSEN, CNTL2)
or Read Strobe (RD, CNTL1). For example, to
configure the primary Flash memory in Combined
space, Bits b2 and b4 of the VM register are set to
’1’ (see Figure 11).
Figure 10. 8031 Memory Modules – Separate Space
Figure 11. 8031 Memory Modules – Combined Space
Primary
Flash
Memory
DPLD
Secondary
Flash
Memory
SRAM
RS0
CSBOOT0-3
FS0-FS7
CS
CS
CS
OE
OE
RD
PSEN
OE
AI02869C
Primary
Flash
Memory
DPLD
Secondary
Flash
Memory
SRAM
RS0
CSBOOT0-3
FS0-FS7
RD
CS
CS
CS
RD
OE
OE
VM REG BIT 2
PSEN
VM REG BIT 0
VM REG BIT 1
VM REG BIT 3
VM REG BIT 4
OE
AI02870C



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