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ST20-GP6 датащи(PDF) 108 Page - STMicroelectronics |
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ST20-GP6 датащи(HTML) 108 Page - STMicroelectronics |
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108 / 123 page ![]() ST20-GP6 108/123 20 Timing specifications 20.1 EMI timings The ‘Reference Clock’ used in the EMI timings is a virtual clock and is defined as the point at which all EMI strobe and address outputs programmed to change at the start of a memory cycle have become valid. This is designed to remove process dependent skews from the datasheet descrip- tion and highlight the dominant influence of address and strobe timings on memory system design. Table 20.1 EMI cycle timings Notes: 1 MemReadnotWrite strobe — not applicable as it does not change state mid cycle. 2 Timed relative to the end of the access cycle. There could be many clocks in the access cycle, and the strobes may be programmed to go inactive at a previous clock cycle. Symbol Parameter Min Max Units Notes tCHAV Reference clock high to Address valid -9 0 ns tCLSV Reference clock low to Strobe valid -11 3 ns 1 tCHSV Reference clock high to Strobe valid -9 0 ns tRDVCH Read Data valid to Reference clock high 10 ns 2 tCHRDX Read Data hold after Reference clock high 0 ns 2 tSVRDX Read Data hold after Strobe valid 0 ns tCHWDV Reference clock high to Write Data valid 2 ns tWVCH MemWait valid to Reference clock high 20 ns tCHWX MemWait hold after Reference clock high 0 ns |
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